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A self-contained text, suitable for a broad audience. Presents basic concepts in electronics, transistor physics, and neurobiology for readers without backgrounds in those areas. Annotation copyrighted by Book News, Inc., Portland, OR
This book is an edited selection of the papers presented at the International Workshop on VLSI for Artifidal Intelligence and Neural Networks which was held at the University of Oxford in September 1990. Our thanks go to all the contributors and especially to the programme committee for all their hard work. Thanks are also due to the ACM-SIGARCH, the IEEE Computer Society, and the lEE for publicizing the event and to the University of Oxford and SUNY-Binghamton for their active support. We are particularly grateful to Anna Morris, Maureen Doherty and Laura Duffy for coping with the administrative problems. Jose Delgado-Frias Will Moore April 1991 vii PROLOGUE Artificial intelligence and neural network algorithms/computing have increased in complexity as well as in the number of applications. This in tum has posed a tremendous need for a larger computational power than can be provided by conventional scalar processors which are oriented towards numeric and data manipulations. Due to the artificial intelligence requirements (symbolic manipulation, knowledge representation, non-deterministic computations and dynamic resource allocation) and neural network computing approach (non-programming and learning), a different set of constraints and demands are imposed on the computer architectures for these applications.
This volume contains the proceedings of a workshop on Analog Integrated Neural Systems held May 8, 1989, in connection with the International Symposium on Circuits and Systems. The presentations were chosen to encompass the entire range of topics currently under study in this exciting new discipline. Stringent acceptance requirements were placed on contributions: (1) each description was required to include detailed characterization of a working chip, and (2) each design was not to have been published previously. In several cases, the status of the project was not known until a few weeks before the meeting date. As a result, some of the most recent innovative work in the field was presented. Because this discipline is evolving rapidly, each project is very much a work in progress. Authors were asked to devote considerable attention to the shortcomings of their designs, as well as to the notable successes they achieved. In this way, other workers can now avoid stumbling into the same traps, and evolution can proceed more rapidly (and less painfully). The chapters in this volume are presented in the same order as the corresponding presentations at the workshop. The first two chapters are concerned with fmding solutions to complex optimization problems under a predefmed set of constraints. The first chapter reports what is, to the best of our knowledge, the first neural-chip design. In each case, the physics of the underlying electronic medium is used to represent a cost function in a natural way, using only nearest-neighbor connectivity.
This volume contains the proceedings of a workshop on Analog Integrated Neural Systems held May 8, 1989, in connection with the International Symposium on Circuits and Systems. The presentations were chosen to encompass the entire range of topics currently under study in this exciting new discipline. Stringent acceptance requirements were placed on contributions: (1) each description was required to include detailed characterization of a working chip, and (2) each design was not to have been published previously. In several cases, the status of the project was not known until a few weeks before the meeting date. As a result, some of the most recent innovative work in the field was presented. Because this discipline is evolving rapidly, each project is very much a work in progress. Authors were asked to devote considerable attention to the shortcomings of their designs, as well as to the notable successes they achieved. In this way, other workers can now avoid stumbling into the same traps, and evolution can proceed more rapidly (and less painfully). The chapters in this volume are presented in the same order as the corresponding presentations at the workshop. The first two chapters are concerned with fmding solutions to complex optimization problems under a predefmed set of constraints. The first chapter reports what is, to the best of our knowledge, the first neural-chip design. In each case, the physics of the underlying electronic medium is used to represent a cost function in a natural way, using only nearest-neighbor connectivity.
Spiking Neural Networks (SNN) closely imitate biological networks. Information processing occurs in both spatial and temporal manner, making SNN extremely interesting for the pertinent mimicking of the biological brain. Biological brains code and transmit the sensory information in the form of spikes that capture the spatial and temporal information of the environment with amazing precision. This information is processed in an asynchronous way by the neural layer performing recognition of complex spatio-temporal patterns with sub-milliseconds delay and at with a power budget in the order of 20W. The efficient spike coding mechanism and the asynchronous and sparse processing and communication of spikes seems to be key in the energy efficiency and high-speed computation capabilities of biological brains. SNN low-power and event-based computation make them more attractive when compared to other artificial neural networks (ANN).
Neuromorphic Systems Engineering: Neural Networks in Silicon emphasizes three important aspects of this exciting new research field. The term neuromorphic expresses relations to computational models found in biological neural systems, which are used as inspiration for building large electronic systems in silicon. By adequate engineering, these silicon systems are made useful to mankind. Neuromorphic Systems Engineering: Neural Networks in Silicon provides the reader with a snapshot of neuromorphic engineering today. It is organized into five parts viewing state-of-the-art developments within neuromorphic engineering from different perspectives. Neuromorphic Systems Engineering: Neural Networks in Silicon provides the first collection of neuromorphic systems descriptions with firm foundations in silicon. Topics presented include: large scale analog systems in silicon neuromorphic silicon auditory (ear) and vision (eye) systems in silicon learning and adaptation in silicon merging biology and technology micropower analog circuit design analog memory analog interchipcommunication on digital buses £/LIST£ Neuromorphic Systems Engineering: Neural Networks in Silicon serves as an excellent resource for scientists, researchers and engineers in this emerging field, and may also be used as a text for advanced courses on the subject.
Explains current co-design and co-optimization methodologies for building hardware neural networks and algorithms for machine learning applications This book focuses on how to build energy-efficient hardware for neural networks with learning capabilities—and provides co-design and co-optimization methodologies for building hardware neural networks that can learn. Presenting a complete picture from high-level algorithm to low-level implementation details, Learning in Energy-Efficient Neuromorphic Computing: Algorithm and Architecture Co-Design also covers many fundamentals and essentials in neural networks (e.g., deep learning), as well as hardware implementation of neural networks. The book begins with an overview of neural networks. It then discusses algorithms for utilizing and training rate-based artificial neural networks. Next comes an introduction to various options for executing neural networks, ranging from general-purpose processors to specialized hardware, from digital accelerator to analog accelerator. A design example on building energy-efficient accelerator for adaptive dynamic programming with neural networks is also presented. An examination of fundamental concepts and popular learning algorithms for spiking neural networks follows that, along with a look at the hardware for spiking neural networks. Then comes a chapter offering readers three design examples (two of which are based on conventional CMOS, and one on emerging nanotechnology) to implement the learning algorithm found in the previous chapter. The book concludes with an outlook on the future of neural network hardware. Includes cross-layer survey of hardware accelerators for neuromorphic algorithms Covers the co-design of architecture and algorithms with emerging devices for much-improved computing efficiency Focuses on the co-design of algorithms and hardware, which is especially critical for using emerging devices, such as traditional memristors or diffusive memristors, for neuromorphic computing Learning in Energy-Efficient Neuromorphic Computing: Algorithm and Architecture Co-Design is an ideal resource for researchers, scientists, software engineers, and hardware engineers dealing with the ever-increasing requirement on power consumption and response time. It is also excellent for teaching and training undergraduate and graduate students about the latest generation neural networks with powerful learning capabilities.
Neuromorphic systems are implementations in silicon of sensory and neural systems whose architecture and design are based on neurobiology. This growing area proffers exciting possibilities, such as sensory systems that can compete with human senses and pattern recognition systems that can run in real time. The area is at the intersection of neurophysiology, computer science and electrical engineering. This book brings together recent developments in Europe and the US, so that researchers in both academia and industry can find out about the state of the art. As well as elementary material on what neuromorphic systems are and why they are growing in importance, the book contains details of current work. Them are articles on aspects of implementing sensory neuromorphic systems, as well as articles on neuromorphic hardware.