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This book demonstrates the breadth and depth of IP protection through logic locking, considering both attacker/adversary and defender/designer perspectives. The authors draw a semi-chronological picture of the evolution of logic locking during the last decade, gathering and describing all the DO’s and DON’Ts in this approach. They describe simple-to-follow scenarios and guide readers to navigate/identify threat models and design/evaluation flow for further studies. Readers will gain a comprehensive understanding of all fundamentals of logic locking.
With the popularity of hardware security research, several edited monograms have been published, which aim at summarizing the research in a particular field. Typically, each book chapter is a recompilation of one or more research papers, and the focus is on summarizing the state-of-the-art research. Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book have contributed to this field significantly through numerous fundamental papers.
This book is a single-source solution for anyone who is interested in exploring emerging reconfigurable nanotechnology at the circuit level. It lays down a solid foundation for circuits based on this technology having considered both manual as well as automated design flows. The authors discuss the entire design flow, consisting of both logic and physical synthesis for reconfigurable nanotechnology-based circuits. The authors describe how transistor reconfigurable properties can be exploited at the logic level to have a more efficient circuit design flow, as compared to conventional design flows suited for CMOS. Further, the book provides insights into hardware security features that can be intrinsically developed using the runtime reconfigurable features of this nanotechnology.
This book includes high impact papers presented at the International Conference on Communication, Computing and Electronics Systems 2019, held at the PPG Institute of Technology, Coimbatore, India, on 15-16 November, 2019. Discussing recent trends in cloud computing, mobile computing, and advancements of electronics systems, the book covers topics such as automation, VLSI, embedded systems, integrated device technology, satellite communication, optical communication, RF communication, microwave engineering, artificial intelligence, deep learning, pattern recognition, Internet of Things, precision models, bioinformatics, and healthcare informatics.
This book comprises select peer-reviewed proceedings of the international conference on Research in Intelligent and Computing in Engineering (RICE 2020) held at Thu Dau Mot University, Vietnam. The volume primarily focuses on latest research and advances in various computing models such as centralized, distributed, cluster, grid, and cloud computing. Practical examples and real-life applications of wireless sensor networks, mobile ad hoc networks, and internet of things, data mining and machine learning are also covered in the book. The contents aim to enable researchers and professionals to tackle the rapidly growing needs of network applications and the various complexities associated with them.
This book documents some of the most recent advances on the physical layer of the Internet of Things (IoT), including sensors, circuits, and systems. The application area selected for illustrating these advances is that of autonomous, wearable systems for real-time medical diagnosis. The book is unique in that it adopts a holistic view of such systems and includes not only the sensor and processing subsystems, but also the power, communication, and security subsystems. Particular attention is paid to the integration of these IoT subsystems as well as the prototyping platforms needed for achieving such integration. Other unique features include the discussion of energy-harvesting subsystems to achieve full energy autonomy and the consideration of hardware security as a requirement for the integrity of the IoT physical layer. One unifying thread of the various designs considered in this book is that they have all been fabricated and tested in an advanced, low-power CMOS process, namely GLOBALFOUNDRIES 65nm CMOS LPe.
This book constitutes the proceedings of the 18th International Conference on Cryptographic Hardware and Embedded Systems, CHES 2016, held in Santa Barbara, CA, USA, in August 2016. The 30 full papers presented in this volume were carefully reviewed and selected from 148 submissions. They were organized in topical sections named: side channel analysis; automotive security; invasive attacks; side channel countermeasures; new directions; software implementations; cache attacks; physical unclonable functions; hardware implementations; and fault attacks.
This book constitutes the proceedings of the 19th International Conference on Cryptographic Hardware and Embedded Systems, CHES 2017, held in Taipei, Taiwan, in September 2017. The 33 full papers presented in this volume were carefully reviewed and selected from 130 submissions. The annual CHES conference highlights new results in the design and analysis of cryptographic hardware and soft- ware implementations. The workshop builds a valuable bridge between the research and cryptographic engineering communities and attracts participants from industry, academia, and government organizations.