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This workshop was a continuation of the PCRCW ’94 workshop that focused on issues in parallel communication and routing in support of parallel processing. The workshop series provides a forum for researchers and designers to exchange ideas with respect to challenges and issues in supporting communication for high-performance parallel computing. Within the last few years we have seen the scope of interconnection network technology expand beyond traditional multiprocessor systems to include high-availability clusters and the emerging class of system area networks. New application domains are creating new requirements for interconnection network services, e.g., real-time video, on-line data mining, etc. The emergence of quality-of-service guarantees within these domains challenges existing approaches to interconnection network design. In the recent past we have seen the emphasis on low-latency software layers, the application of multicomputer interconnection technology to distributed shared-memory multiprocessors and LAN interconnects, and the shift toward the use of commodity clusters and standard components. There is a continuing evolution toward powerful and inexpensive network interfaces, and low-cost, high-speed routers and switches from commercial vendors. The goal is to address the above issues in the context of networks of workstations, multicomputers, distributed shared-memory multiprocessors, and traditional tightly-coupled multiprocessor interconnects. The PCRCW ’97 workshop presented 20 regular papers and two short papers covering a range of topics dealing with modern interconnection networks. It was hosted by the Georgia Institute of Technology and sponsored by the Atlanta Chapter of the IEEE Computer Society.
This volume contains revised versions of the 23 regular papers presented at the First International Workshop on Parallel Computer Routing and Communication (PCRCW '94), held in Seattle, Washington in May 1994. Routing for parallel computer communication has recently experienced almost explosive activity: ever increasing processor speeds are placing greater demands on interprocessor communication, while technological advances offer new capabilities to respond to those demands. The contributions from industry and academia cover all areas, from details of hardware design to proofs of theoretical results. There are also many papers dealing with the performance of various adaptive routing schemes, new network topologies, network interfaces, and fault-tolerant issues.
Clusters of workstations/PCs connected by o?-the-shelf networks have become popular as a platform for cost-e?ective parallel computing. Hardware and so- ware technological advances have made this network-based parallel computing platform feasible. A large number of research groups from academia and industry are working to enhance the capabilities of such a platform, thereby improving its cost-e?ectiveness and usability. These developments are facilitating the mig- tion of many existing applications as well as the development of new applications on this platform. Continuing in the tradition of the two previously successful workshops, this 3rd Workshop on Communication, Architecture and Applications for Netwo- based Parallel Computing (CANPC’99) has brought together researchers and practitioners working in architecture, system software, applications and perf- mance evaluation to discuss state-of-the-art solutions for network-based parallel computing systems. This workshop has become an excellent forum for timely dissemination of ideas and healthy interaction on topics at the cutting edge in cluster computing technology. Each submitted paper underwent a rigorous review process, and was assigned to at least 3 reviewers, including at least 2 program committee members. Each paper received at least 2 reviews, most received 3 and some even had 4 reviews.
This book constitutes the refereed proceedings of the First International Workshop on Communication and Architectural Support for Network-Based Parallel Computing, CANPC'97, held in San Antonio, Texas, USA, in February 1997. The 19 revised full papers presented were carefully selected from a total of 36 submissions. Among the topics addressed are processor/network interfaces, communication protocols, high-performance network technology, operating systems and architectural issues, and load balancing techniques. All in all, the papers competently describe the state-of-the-art for network-based computing systems.
This millennium will see the increased use of parallel computing technologies at all levels of mainstream computing. Most computer hardware will use these technologies to achieve higher computing speeds, high speed access to very large distributed databases and greater flexibility through heterogeneous computing. These developments can be expected to result in the extended use of all types of parallel computers in virtually all areas of human endeavour. Compute-intensive problems in emerging areas such as financial modelling and multimedia systems, in addition to traditional application areas of parallel computing such as scientific computing and simulation, will stimulate the developments. Parallel computing as a field of scientific research and development will move from a niche concentrating on solving compute-intensive scientific and engineering problems to become one of the fundamental computing technologies.This book gives a retrospective view of what has been achieved in the parallel computing field during the past three decades, as well as a prospective view of expected future developments./a
This proceedings contains the papers presented at the 2004 IFIP International Conference on Network and Parallel Computing (NPC 2004), held at Wuhan, China, from October 18 to 20, 2004. The goal of the conference was to establish an international forum for engineers and scientists to present their ideas and experiences in network and parallel computing. A total of 338 submissions were received in response to the call for papers. These papers werefrom Australia, Brazil,Canada,China, Finland, France, G- many, Hong Kong, India, Iran, Italy, Japan, Korea, Luxemburg, Malaysia, N- way, Spain, Sweden, Taiwan, UK, and USA. Each submission was sent to at least three reviewers.Each paper was judged according to its originality,inno- tion, readability, and relevance to the expected audience. Based on the reviews received, a total of 69 papers were accepted to be included in the proceedings. Among the 69 papers, 46 were accepted as full papers and were presented at the conference.Wealso accepted23papersasshortpapers;eachofthesepaperswas given an opportunity to have a brief presentation at the conference, followed by discussions in a poster session. Thus, due to the limited scope and time of the conference and the high number of submissions received, only 20% of the total submissions were included in the ?nal program.
This book constitutes the strictly refereed proceedings of the Second International Workshop on Communication and Architectural Support for Network-Based Parallel Computing, CANPC'98, held in Las Vegas, Nevada, USA, in January/February 1998. The 18 revised full papers presented were selected from 38 submissions on the basis of four to five reviews per paper. The volume comprises a representative compilation of state-of-the-art solutions for network-based parallel computing. Several new interconnection technologies, new software schemes and standards are studied and developed to provide low-latency and high-bandwidth interconnections for network-based parallel computing.
This IMA Volume in Mathematics and its Applications ALGORITHMS FOR PARALLEL PROCESSING is based on the proceedings of a workshop that was an integral part of the 1996-97 IMA program on "MATHEMATICS IN HIGH-PERFORMANCE COMPUTING. " The workshop brought together algorithm developers from theory, combinatorics, and scientific computing. The topics ranged over models, linear algebra, sorting, randomization, and graph algorithms and their analysis. We thank Michael T. Heath of University of lllinois at Urbana (Com puter Science), Abhiram Ranade of the Indian Institute of Technology (Computer Science and Engineering), and Robert S. Schreiber of Hewlett Packard Laboratories for their excellent work in organizing the workshop and editing the proceedings. We also take this opportunity to thank the National Science Founda tion (NSF) and the Army Research Office (ARO), whose financial support made the workshop possible. A vner Friedman Robert Gulliver v PREFACE The Workshop on Algorithms for Parallel Processing was held at the IMA September 16 - 20, 1996; it was the first workshop of the IMA year dedicated to the mathematics of high performance computing. The work shop organizers were Abhiram Ranade of The Indian Institute of Tech nology, Bombay, Michael Heath of the University of Illinois, and Robert Schreiber of Hewlett Packard Laboratories. Our idea was to bring together researchers who do innovative, exciting, parallel algorithms research on a wide range of topics, and by sharing insights, problems, tools, and methods to learn something of value from one another.
This book constitutes the proceedings of the 10th IFIP International Conference on Network and Parallel Computing, NPC 2013, held in Guiyang, China, in September 2013. The 34 papers presented in this volume were carefully reviewed and selected from 109 submissions. They are organized in topical sections named: parallel programming and algorithms; cloud resource management; parallel architectures; multi-core computing and GPU; and miscellaneous.