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Computers are everywhere around us. We, for example, as air passengers, car drivers, laptop users with Internet connection, cell phone owners, hospital patients, inhabitants in the vicinity of a nuclear power station, students in a digital library or customers in a supermarket are dependent on their correct operation. Computers are incredibly fast, inexpensive and equipped with almost unimag- able large storage capacity. Up to 100 million transistors per chip are quite common today - a single transistor for each citizen of a large capital city in the world can be 2 easily accommodated on an ordinary chip. The size of such a chip is less than 1 cm . This is a fantastic achievement for an unbelievably low price. However, the very small and rapidly decreasing dimensions of the transistors and their connections over the years are also the reason for growing problems with reliability that will dramatically increase for the nano-technologies in the near future. Can we always trust computers? Are computers always reliable? Are chips suf- ciently tested with respect to all possible permanent faults if we buy them at a low price or have errors due to undetected permanent faults to be discovered by c- current checking? Besides permanent faults, many temporary or transient faults are also to be expected.
This book constitutes the refereed proceedings of the 17th International Conference on Tools and Algorithms for the Construction and Analysis of Systems, TACAS 2011, held in Saarbrücken, Germany, March 26—April 3, 2011, as part of ETAPS 2011, the European Joint Conferences on Theory and Practice of Software. The 32 revised full papers presented were carefully reviewed and selected from 112 submissions. The papers are organized in topical sections on memory models and consistency, invariants and termination, timed and probabilistic systems, interpolations and SAT-solvers, learning, model checking, games and automata, verification, and probabilistic systems.
Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for the verification of hardware and software in industry. The editors and authors of this handbook are among the world's leading researchers in this domain, and the 32 contributed chapters present a thorough view of the origin, theory, and application of model checking. In particular, the editors classify the advances in this domain and the chapters of the handbook in terms of two recurrent themes that have driven much of the research agenda: the algorithmic challenge, that is, designing model-checking algorithms that scale to real-life problems; and the modeling challenge, that is, extending the formalism beyond Kripke structures and temporal logic. The book will be valuable for researchers and graduate students engaged with the development of formal methods and verification tools.
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
The two-volume set LNCS 7609 and 7610 constitutes the thoroughly refereed proceedings of the 5th International Symposium on Leveraging Applications of Formal Methods, Verification and Validation, held in Heraklion, Crete, Greece, in October 2012. The two volumes contain papers presented in the topical sections on adaptable and evolving software for eternal systems, approaches for mastering change, runtime verification: the application perspective, model-based testing and model inference, learning techniques for software verification and validation, LearnLib tutorial: from finite automata to register interface programs, RERS grey-box challenge 2012, Linux driver verification, bioscientific data processing and modeling, process and data integration in the networked healthcare, timing constraints: theory meets practice, formal methods for the development and certification of X-by-wire control systems, quantitative modelling and analysis, software aspects of robotic systems, process-oriented geoinformation systems and applications, handling heterogeneity in formal development of HW and SW Systems.
This book constitutes the refereed proceedings of the 20th International Symposium on Model Checking Software, SPIN 2013, held in Stony Brook, NY, USA, in July 2013. The 18 regular papers, 2 tool demonstration papers, and 2 invited papers were carefully reviewed and selected from 40 submissions. The traditional focus of SPIN has been on explicit-state model checking techniques, as implemented in SPIN and other related tools. While such techniques are still of key interest to the workshop, its scope has broadened over recent years to include techniques for the verification and formal testing of software systems in general.
This book constitutes the proceedings of the 21st International Conference on Formal Engineering Methods, ICFEM 2019, held in Shenzhen, China, in November 2019. The 28 full and 8 short papers presented in this volume were carefully reviewed and selected from 94 submissions. They deal with the recent progress in the use and development of formal engineering methods for software and system design and record the latest development in formal engineering methods.
This book consitutes the refereed proceedings of the 10th International Conference on Computer Aided Verification, CAV'98, held in Vancouver, BC, Canada, in June/July 1998. The 33 revised full papers and 10 tool papers presented were carefully selected from a total of 117 submissions. Also included are 11 invited contributions. Among the topics covered are modeling and specification formalisms; verification techniques like state-space exploration, model checking, synthesis, and automated deduction; various verification techniques; applications and case studies, and verification in practice.
This book constitutes the proceedings of the 15th International Conference on Tests and Proofs, TAP 2021, which was held as part of Software Technologies: Applications and Foundations, STAF 2021, and took place online during June 12-25, 2021. The 6 full papers included in this volume were carefully reviewed and selected from 10 submissions. They were organized in topical sections on learning, test resource allocation and benchmarks and on testing.
This book constitutes the thoroughly refereed workshop proceedings of the 9th International Workshop on Structured Object-Oriented Formal Language and Method, SOFL+MSVL 2019, held in Shenzhen, China, in November 2019. The 23 revised full papers included in the volume were carefully reviewed and selected from 43 submissions. They are organized in the following topical sections: testing and debugging, formal verification, problem solving, software analysis and evolution, and software analysis and testing.