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MICROELECTRONIC INTERCONNECTIONS AND MICROASSEMBL Y WORKSHOP 18-21 May 1996, Prague, Czech Republic Conference Organizers: George Harman, NIST (USA) and Pavel Mach (Czech Republic) Summary of the Technical Program Thirty two presentations were given in eight technical sessions at the Workshop. A list of these sessions and their chairpersons is attached below. The Workshop was devoted to the technical aspects of advanced interconnections and microassembly, but also included papers on the education issues required to prepare students to work in these areas. In addition to new technical developments, several papers presented overviews predicting the future directions of these technologies. The basic issue is that electronic systems will continue to be miniaturized and at the same time performance must continue to improve. Various industry roadmaps were discussed as well as new smaller packaging and interconnection concepts. The newest chip packages are often based on the selection of an appropriate interconnection method. An example is the chip-scale package, which has horizontal (x-y) dimensions,;; 20% larger than the actual silicon chip itself. The chip is often flip-chip connected to a micro ball-grid-array, but direct chip attach was described also. Several papers described advances in the manufacture of such packages.
Reviewing the various IC packaging, assembly, and interconnection technologies, this professional reference provides an overview of the materials and the processes, as well as the trends and available options that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC. The book discusses the various packaging approaches, assembly options, and essential manufacturing technologies, among other relevant topics.
Robust Design of Microelectronics Assemblies Against Mechanical Shock, Temperature and Moisture discusses how the reliability of packaging components is a prime concern to electronics manufacturers. The text presents a thorough review of this important field of research, providing users with a practical guide that discusses theoretical aspects, experimental results, and modeling techniques. The authors use their extensive experience to produce detailed chapters covering temperature, moisture, and mechanical shock induced failure, adhesive interconnects, and viscoelasticity. Useful program files and macros are also included. - Discusses how the reliability of packaging components is a prime concern to electronics manufacturers - Presents a thorough review of this important field of research, providing users with a practical guide that discusses theoretical aspects, experimental results, and modeling techniques - Includes program files and macros for additional study
This reference provides a complete discussion of the conversion from standard lead-tin to lead-free solder microelectronic assemblies for low-end and high-end applications. Written by more than 45 world-class researchers and practitioners, the book discusses general reliability issues concerning microelectronic assemblies, as well as factors specific to the tin-rich replacement alloys commonly utilized in lead-free solders. It provides real-world manufacturing accounts of the introduction of reduced-lead and lead-free technology and discusses the functionality and cost effectiveness of alternative solder alloys and non-solder alternatives replacing lead-tin solders in microelectronics.
Microelectronic packaging has been recognized as an important "enabler" for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.
Microelectronic Packaging analyzes the massive impact of electrochemical technologies on various levels of microelectronic packaging. Traditionally, interconnections within a chip were considered outside the realm of packaging technologies, but this book emphasizes the importance of chip wiring as a key aspect of microelectronic packaging, and focuses on electrochemical processing as an enabler of advanced chip metallization. Divided into five parts, the book begins by outlining the basics of electrochemical processing, defining the microelectronic packaging hierarchy, and emphasizing the impact of electrochemical technology on packaging. The second part discusses chip metallization topics including the development of robust barrier layers and alternative metallization materials. Part III explores key aspects of chip-package interconnect technologies, followed by Part IV's analysis of packages, boards, and connectors which covers materials development, technology trends in ceramic packages and multi-chip modules, and electroplated contact materials. Illustrating the importance of processing tools in enabling technology development, the book concludes with chapters on chemical mechanical planarization, electroplating, and wet etching/cleaning tools. Experts from industry, universities, and national laboratories submitted reviews on each of these subjects, capturing the technological advances made in each area. A detailed examination of how packaging responds to the challenges of Moore's law, this book serves as a timely and valuable reference for microelectronic packaging and processing professionals and other industrial technologists.
All packaging engineers and technologists who want to ensure thatthey give their customers the highest quality, most cost-effectiveproducts should know that the paradigm has shifted. It has shiftedaway from the MIL-STDs and other government standards and testprocedures that don't cost-effectively address potential failuremechanisms or the manufacturing processes of the product. It hasshifted decisively towards tackling the root causes of failure andthe appropriate implementation of cost-effective process controls,qualityscreens, and tests. This book's groundbreaking, science-based approach to developingqualification and quality assurance programs helps engineers reacha new level of reliability in today's high-performancemicroelectronics. It does this with powerful... * Techniques for identifying and modeling failure mechanismsearlier in the design cycle, breaking the need to rely on fielddata * Physics-of-failure product reliability assessment methods thatcan be proactively implemented throughout the design andmanufacture of the product * Process controls that decrease variabilities in the end productand reduce end-of-line screening and testing A wide range of microelectronic package and interconnectconfigurations for both single-and multi-chip modules is examined,including chip and wire-bonds, tape-automated (TAB), flip-TAB,flip-chip bonds, high-density interconnects, chip-on-board designs(COB), MCM, 3-D stack, and many more. The remaining packageelements, such as die attachment, case and lid, leads, and lid andlead seals are also discussed in detail. The product of a distinguished team of authors and editors, thisbook's guidelines for avoiding potential high-risk manufacturingand qualification problems, as well as for implementing ongoingquality assurance, are sure to prove invaluable to both studentsand practicing professionals. For the professional engineer involved in the design andmanufacture of products containing electronic components, here is acomprehensive handbook to the theory and methods surrounding theassembly of microelectronic and electronic components. The bookfocuses on computers and consumer electronic products with internalsubsystems that reflect mechanical design constraints, costlimitations, and aesthetic and ergonomic concerns. Taking a totalsystem approach to packaging, the book systematically examines:basic chip and computer architecture; design and layout;interassembly and interconnections; cooling scheme; materialsselection, including ceramics, glasses, and metals; stress,vibration, and acoustics; and manufacturing and assemblytechnology. 1994 (0-471-53299-1) 800 pp. INTEGRATED CIRCUIT, HYBRID, AND MULTICHIP MODULE PACKAGE DESIGNGUIDELINES: A Focus on Reliability --Michael Pecht This comprehensive guide features a uniquely organized time-phasedapproach to design, development, qualification, manufacture, andin-service management. It provides step-by-step instructions on howto define realistic system requirements, define the system usageenvironment, identify potential failure modes, characterizematerials and processes by the key control label factors, and useexperiment, step-stress, and accelerated methods to ensure optimumdesign before production begins. Topics covered include: detaileddesign guidelines for substrate...wire and wire, tape automated,and flip-chip bonding...element attachment and case, lead, lead andlid seals--incorporating dimensional and geometric configurationsof package elements, manufacturing and assembly conditions,materials selection, and loading conditions. 1993 (0-471-59446-6)454 pp.
It is challenging at best to find a resource that provides the breadth of information necessary to develop a successful micro electro mechanical system (MEMS) design. Micro Electro Mechanical System Design is that resource. It is a comprehensive, single-source guide that explains the design process by illustrating the full range of issues involved,
Electronics has become the largest industry, surpassing agriculture, auto, and heavy metal industries. It has become the industry of choice for a country to prosper, already having given rise to the phenomenal prosperity of Japan, Korea, Singapore, Hong Kong, and Ireland among others. At the current growth rate, total worldwide semiconductor sales will reach $300B by the year 2000. The key electronic technologies responsible for the growth of the industry include semiconductors, the packaging of semiconductors for systems use in auto, telecom, computer, consumer, aerospace, and medical industries, displays, magnetic, and optical storage as well as software and system technologies. There has been a paradigm shift, however, in these technologies, from mainframe and supercomputer applications at any cost, to consumer applications at approximately one-tenth the cost and size. Personal computers are a good example, going from $500IMIP when products were first introduced in 1981, to a projected $IIMIP within 10 years. Thin, light portable, user friendly and very low-cost are, therefore, the attributes of tomorrow's computing and communications systems. Electronic packaging is defined as interconnection, powering, cool ing, and protecting semiconductor chips for reliable systems. It is a key enabling technology achieving the requirements for reducing the size and cost at the system and product level.