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To support the increasing functions of mobile devices, small-footprint and high-performance power conversion is required. In this thesis, a segmented output stage for the implementation of integrated DC-DC converters that operate at the multi-MHz range is explored. The output stage consists of two major parts, the output power transistors and their respective gate-drivers. A new FOM is developed for the design and selection of CMOS-based power MOSFETs, and an optimization method is formulated to size the gate-drivers. Both approaches strive to minimize the power consumption of the output stage, and have been verified via simulation. In addition, the output stage employs a segmentation scheme to increase the converter efficiency at the light-load conditions. The output stage has been fabricated with the 5V-option of TSMC's 0.25mum standard CMOS technology. The maximum power conversion efficiencies measured experimentally at switching frequency 6.25MHz and 10MHz are 85% and 82%, respectively.
Increasing demand for efficiency and power density pushes Si-based devices to some of their inherent material limits, including those related to temperature operation, switching frequency, and blocking voltage. Recently, SiC-based power devices are promising candidates for high-power and high-frequency switching applications. Today, SiC MOSFETs are commercially available from several manufacturers. Although technology affiliated with SiC MOSFETs is improving rapidly, many challenges remain, and some of them are investigated in this work. The research work in this dissertation is divided into the three following parts. Firstly, the static and switching characteristics of the state-of-the-art 1.2 kV planar and double-trench SiC MOSFETs from two different manufacturers are evaluated. The effects of different biasing voltages, DC link voltages, and temperatures are analysed. The characterisation results show that the devices exhibit superior switching performances under different operating conditions. Moreover, several aspects of using the SiC MOSFET’s body diode in a DC/DC converter are investigated, comparing the body-diodes of planar and double-trench devices. Reverse recovery is evaluated in switching tests considering the case temperature, switching rate, forward current, and applied voltage. Based on the measurement results, the junction temperature is estimated to guarantee safe operation. A simple electro-thermal model is proposed in order to estimate the maximum allowed switching frequency based on the thermal design of the SiC devices. Using these results, hard- and soft-switching converters are designed, and devices are characterised as being in continuous operation at a very high switching frequency of 1 MHz. Thereafter, the SiC MOSFETs are operated in a continuous mode in a 10 kW / 100-250 kHz buck converter, comparing synchronous rectification, the use of the body diode, and the use of an external Schottky diode. Further, the parallel operation of the planar devices is considered. Thus, the paralleling of SiC MOSFETs is investigated before comparing the devices in continuous converter operation. In this regard, the impact of the most common mismatch parameters on the static and dynamic current sharing of the transistors is evaluated, showing that paralleling of SiC MOSFETs is feasible. Subsequently, an analytical model of SiC MOSFETs for switching loss optimisation is proposed. The analytical model exhibits relatively close agreement with measurement results under different test conditions. The proposed model tracks the oscillation effectively during both turn-on and –off transitions. This has been achieved by considering the influence of the most crucial parasitic elements in both power and gate loops. In the second part, a comprehensive short-circuit ruggedness evaluation focusing on different failure modes of the planar and double-trench SiC devices is presented. The effects of different biasing voltages, DC link voltages, and gate resistances are evaluated. Additionally, the temperature-dependence of the short-circuit capability is evaluated, and the associated failure modes are analysed. Subsequently, the design and test of two different methods for overcurrent protection are proposed. The desaturation technique is applied to the SiC MOSFETs and compared to a second method that depends on the stray inductance of the devices. Finally, the benefits of using SiC devices in continuous high-frequency, high-power DC/DC converters is experimentally evaluated. In this regard, a design optimisation of a high-frequency transformer is introduced, and the impact of different core materials, conductor designs, and winding arrangements are evaluated. A ZVZCS Phase-Shift Full-Bridge unidirectional DC/DC converter is proposed, using only the parasitic leakage inductance of the transformer. Experimental results for a 10 kW, (100-250) kHz prototype indicate an efficiency of up to 98.1% for the whole converter. Furthermore, an optimized control method is proposed to minimise the circulation current in the isolated bidirectional dual active bridge DC/DC converter, based on a modified dual-phase-shift control method. This control method is also experimentally compared with traditional single-phase shift control, yielding a significant improvement in efficiency. The experimental results confirm the theoretical analysis and show that the proposed control can enhance the overall converter efficiency and expand the ZVZCS range. Die steigende Nachfrage nach Effizienz und Leistungsdichte bringt Si-basierte eistungsbauteile an einige inhärente Materialgrenzen, die unter anderem mit der Temperaturbelastung, der Schaltfrequenz und der Blockierspannung in Zusammenhang stehen. In jüngster Zeit sind SiC-basierte Leistungsbauelemente vielversprechende Kandidaten für Hochleistungs- und Hochfrequenzanwendungen. Aktuell sind SiC-MOSFETs von mehreren Herstellern im Handel erhältlich. Obwohl sich die Technologie der SiC-MOSFETs rasch verbessert, werden viele Herausforderungen bestehen bleiben. Einige dieser Herausforderungen werden in dieser Arbeit untersucht. Die Untersuchungen in dieser Dissertation gliedern sich in die drei folgenden Teile: Im ersten Teil erfolgt, die statische und die transiente Charakterisierung der aktuellen 1,2 kV Planarund Doubletrench SiC-MOSFETs verschiedener Hersteller. Die Auswirkungen unterschiedlicher Gatespannungen, Zwischenkreisspannungen und Temperaturen werden analysiert. Die Ergebnisse der Charakterisierung zeigen, dass die Bauteile überlegene Schaltleistungen unter verschiedenen Betriebsbedingungen aufweisen. Darüber hinaus wird der Einsatz der internen SiC-Bodydioden in einem DC/DC-Wandler untersucht, wobei die Unterschiede zwischen Planar- und Doppeltrench-Bauteilen aufgezeigt werden. Das Reverse-Recovery-Verhalten wird unter Berücksichtigung der Gehäusetemperatur, der Schaltgeschwindigkeit, des Durchlassstroms und der angelegten Spannung bewertet. Anhand der Messergebnisse wird die Sperrschichttemperatur geschätzt, damit ein sicherer Betrieb gewährleistet ist. Ein einfaches elektrothermisches Modell wird vorgestellt, um die maximal zulässige Schaltfrequenz auf der Grundlage des thermischen Designs der SiC-Bauteile abzuschätzen. Anhand dieser Ergebnisse werden hart- und weichschaltende Umrichter konzipiert und die Bauteile werden im Dauerbetrieb mit einer sehr hohen Schaltfrequenz von 1 MHz untersucht. Danach werden die SiC-MOSFETs im Dauerbetrieb in einem 10 kW / 100-250 kHz-Tiefsetzsteller betrieben. Dabei wird die Synchrongleichrichtung, die Verwendung der internen Diode und die Verwendung einer externen Schottky-Diode verglichen. Außerdem wird die Parallelisierung von SiC-MOSFETs untersucht, bevor die Parallelschaltung der verschiedenen Bauelemente ebenso im kontinuierlichen Konverterbetrieb verglichen wird. Es wird der Einfluss der häufigsten Parametervariationen auf die statische und dynamische Stromaufteilung der Transistoren analysiert, was zeigt, dass eine Parallelisierung von SiC-MOSFETs möglich ist. Anschließend wird ein analytisches Modell der SiC-MOSFETs zur Schaltverlustoptimierung vorgeschlagen. Das analytische Modell zeigt eine relativ enge Übereinstimmung mit den Messergebnissen unter verschiedenen Testbedingungen. Das vorgeschlagene Modell bildet die Schwingungen sowohl beim Ein- als auch beim Ausschalten effektiv nach. Dies wurde durch die Berücksichtigung der wichtigsten parasitären Elemente in Strom- und Gatekreisen erreicht. Im zweiten Teil wird eine umfassende Bewertung der Kurzschlussfestigkeit mit Fokus auf verschiedene Ausfallmodi der planaren und double-trench SiC-Bauelemente vorgestellt. Die Auswirkungen unterschiedlicher Gatespannungen, Zwischenkreisspannungen und Gate-Widerstände werden ausgewertet. Zusätzlich wird die temperaturabhängige Kurzschlussfähigkeit ausgewertet und die zugehörigen Fehlerfälle werden analysiert. Anschließend wird die Auslegung und Prüfung von zwei verschiedenen Verfahren zum Überstromschutz evaluiert. Die „Desaturation“-Technik wird auf SiC-MOSFETs angewendet und mit einer zweiten Methode verglichen, welche die parasitäre Induktivität der Bauelemente nutzt. Schließlich wird der Nutzen des Einsatzes von SiC-Bauteilen in kontinuierlichen Hochfrequenz-Hochleistungs-DC/DC-Wandlern experimentell untersucht. In diesem Zusammenhang wird eine Designoptimierung eines Hochfrequenztransformators vorgestellt und der Einfluss verschiedener Kernmaterialien, Leiterausführungen und Wicklungsanordnungen wird bewertet. Es wird ein unidirektionaler ZVZCS Vollbrücken-DC/DC-Wandler vorgestellt, der nur die parasitäre Streuinduktivität des Transformators verwendet. Experimentelle Ergebnisse für einen 10 kW, (100-250) kHz Prototyp zeigen einenWirkungsgrad von bis zu 98,1% für den gesamten Umrichter. Abschließend wird ein optimiertes Regelverfahren verwendet, welches auf einem modifizierten Dual-Phase-Shift-Regelverfahren basiert, um den Kreisstrom im isolierten bidirektionalen Dual-Aktiv-Brücken-DC/DC-Wandler zu minimieren. Diese Regelmethode wird experimentell mit der herkömmlichen Single-Phase-Shift-Regelung verglichen. Hierbei zeigt sich eine deutliche Effizienzsteigerung durch die neue Regelmethode. Die experimentellen Ergebnisse bestätigen die theoretische Analyse und zeigen, dass die vorgeschlagene Regelung den Gesamtwirkungsgrad des Umrichters erhöhen und den ZVZCS-Bereich erweitern kann.
CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very basics.
Evolutions in integrated circuit technology require the use of a high-frequency synchronous buck converter in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency operation leads to increased power MOSFET switching losses. Optimization of the MOSFETs plays an important role in improving converter performance. This dissertation focuses on revealing the power loss mechanism of power MOSFETs and the relationship between power MOSFET structure and its power loss. The analytical device model, combined with circuit modeling, cannot reveal the relationship between device structure and its power loss due to the highly non-linear characteristics of power MOSFETs. A physically-based mixed device/circuit modeling approach is used to investigate the power losses of the MOSFETs under different operating conditions. The physically based device model, combined with SPICE-like circuit simulation, provides an expeditious and inexpensive way of evaluating and optimizing circuit and device concepts. Unlike analytical or other SPICE models of power MOSFETs, the numerical device model, relying little on approximations or simplifications, faithfully represents the behavior of realistic power MOSFETs. The impact of power MOSFET parameters on efficiency of synchronous buck converters, such as gate charge, on resistance, reverse recovery, is studied in detail in this thesis. The results provide a good indication on how to optimize power MOSFETs used in VRMs. The synchronous rectifier plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact SyncFET's performance. This thesis gives a detailed analysis of the SyncFET operation mechanism and provides several techniques to reduce its body-diode influence and suppress its false Cdv/dt trigger-n. This thesis also investigates the influence of several circuit level parameters on the efficiency of the synchronous buck converter, such as input voltage, circuit parasitic inductance, and gate resistance to provide further optimization of synchronous buck converter design.
Low Voltage Power MOSFETs focuses on the design of low voltage power MOSFETs and the relation between the device structure and the performance of a power MOSFET used as a switch in power management applications. This SpringerBriefs close the gap between detailed engineering reference books and the numerous technical papers on the subject of power MOSFETs. The material presented covers low voltage applications extending from battery operated portable electronics, through point of load converters, internet infrastructure, automotive applications, to personal computers and server computers. The issues treated in this volume are explained qualitatively using schematic illustrations, making the discussion easy to follow for all prospective readers.
Ultimate integration of power switch-mode converter relies on two research paths. One path experiments the development of switched-capacitor converters. This approach fits silicon integration but is still limited in term of power density. Inductive DC-DC architectures of converters suffer by the values and size of passive components. This limitation is addressed with an increase in frequency. Increase in switching losses in switches leads to consider advanced technological nodes. Consequently, the capability with respect to input voltage is then limited. Handling 3.3 V input voltage to deliver an output voltage in the range 0.6 V to 1.2 V appears a challenging specification for an inductive buck converter if the smallest footprint is targeted at +90 % efficiency. Smallest footprint is approached through a 3D assembly of passive components to the active silicon die. High switching frequency is also considered to shrink the values of passive components as much as possible. In the context of on-chip power supply, the silicon technology is dictated by the digital functions. Complementary Metal-Oxide- Semiconductor (CMOS) bulk C40 is selected as a study case for 3.3 V input voltage. 3.3 V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) features poor figure of merits and 1.2 V standard core, regular devices are preferred. Moreover future integration as an on-chip power supply is more compatible. A three-MOSFET cascode arrangement is experimented and confronted experimentally to a standard buck arrangement in the same technology. The coupled-phase architecture enables to reduce the switching frequency to half the operating frequency of the passive devices. +100MHz is selected for operation of passive devices. CMOS bulk C40 offers Metal-Oxide-Metal (MOM) and MOS capacitors, in density too low to address the decoupling requirements. Capacitors have to be added externally to the silicon die but in a tight combination. Trench-cap technology is selected and capacitors are fabricated on a separate die that will act as an interposer to receive the silicon die as well as the inductors. The work delivers an object containing a one-phase buck converter with the silicon die flip-chipped on a capacitor interposer where a tiny inductor die is reported. The one-phase demonstrator is suitable for coupled-phase demonstration. Standard and cascode configurations are experimentally compared at 100 MHz and 200 MHz switching frequency. A design methodology is presented to cover a system-to-device approach. The active silicon die is the central design part as the capacitive interposer is fabricated by IPDiA and inductors are provided by Tyndall National Institute. The assembly of the converter sub-parts is achieved using an industrial process. The work details a large set of measurements to show the performances of the delivered DC/DC converters as well as its limitations. A 91.5% peak efficiency at 100MHz switching frequency has been demonstrated.
Designed to complement a range of power electronics study resources, this unique lab manual helps students to gain a deep understanding of the operation, modeling, analysis, design, and performance of pulse-width modulated (PWM) DC-DC power converters. Exercises focus on three essential areas of power electronics: open-loop power stages; small-signal modeling, design of feedback loops and PWM DC-DC converter control schemes; and semiconductor devices such as silicon, silicon carbide and gallium nitride. Meeting the standards required by industrial employers, the lab manual combines programming language with a simulation tool designed for proficiency in the theoretical and practical concepts. Students and instructors can choose from an extensive list of topics involving simulations on MATLAB, SABER, or SPICE-based platforms, enabling readers to gain the most out of the prelab, inlab, and postlab activities. The laboratory exercises have been taught and continuously improved for over 25 years by Marian K. Kazimierczuk thanks to constructive student feedback and valuable suggestions on possible workroom improvements. This up-to-date and informative teaching material is now available for the benefit of a wide audience. Key features: Includes complete designs to give students a quick overview of the converters, their characteristics, and fundamental analysis of operation. Compatible with any programming tool (MATLAB, Mathematica, or Maple) and any circuit simulation tool (PSpice, LTSpice, Synopsys SABER, PLECS, etc.). Quick design section enables students and instructors to verify their design methodology for instant simulations. Presents lab exercises based on the most recent advancements in power electronics, including multiple-output power converters, modeling, current- and voltage-mode control schemes, and power semiconductor devices. Provides comprehensive appendices to aid basic understanding of the fundamental circuits, programming and simulation tools. Contains a quick component selection list of power MOSFETs and diodes together with their ratings, important specifications and Spice models.
This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors’ systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes.