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Alpha AXP Architecture Reference Manual, Second Edition describes the required behavior of all Alpha implementations, as seen by the machine-language programmer. This book discusses Alpha single-board computers, which have been introduced to cover the high-end embedded controller market. Organized into five parts, this edition begins with an overview of the instruction-set architecture. This text then describes the supporting PALcode routines for three operating systems. Other parts consider a particular console implementation that is specific to platforms that support the OpenVMS AXP or DEC OSF/1 operating systems. This book discusses as well the specific operating system PALcode architecture. The final part provides a discussion of console issues for Windows NT with its PALcode description. This book is a valuable resource for machine-language programmers.
This is the authoritative reference on Digital Equipment Corporation's new 64-bit RISC Alpha architecture. Written by the designers of the internal Digital specifications, this book contains complete descriptions of the common architecture required for all implementations and the interfaces required to support the OSF/1 and OpenVMS operating systems.
OpenVMS Operating System Concepts, Second Edition uses a new approach to explain the OpenVMS operating system. Combining discussions of operating system theory with examples of its applications in key OpenVMS operating system facilities, the book provides a thoughtful introduction for application programmers, systems managers, and students. The books shows how OpenVMS system services can tap the power of operating system facilities to perform critical tasks on behalf of applications. It has been updated for OpenVMS and gives program examples in C. · Updated for OpenVMS · Shows program examples in C
Takes a unique systems approach to programming and architecture of the VAX Using the VAX as a detailed example, the first half of this book offers a complete course in assembly language programming. The second describes higher-level systems issues in computer architecture. Highlights include the VAX assembler and debugger, other modern architectures such as RISCs, multiprocessing and parallel computing, microprogramming, caches and translation buffers, and an appendix on the Berkeley UNIX assembler.
This is the authoritative reference on Digital Equipment Corporation's new 64-bit RISC Alpha architecture. Written by the designers of the internal Digital specifications, this book contains complete descriptions of the common architecture required for all implementations and the interfaces required to support the OSF/1 and OpenVMS operating systems.
Architectural specifications can make for dry reading, but this volume should be of interest to at least three types of readers. Serious computer engineers specializing in machine design, application or systems programmers of VAX computers, and computer science or engineering students. This volume provides an example of a successful computer architecture, and how it should be documented. It is a complete description of the machine language interface for VAX computers. And it provides a case study in design and computer organization or assembly language programming.
Computer Architecture/Software Engineering
Step-by-step guide to assembly language for the 64-bit Itanium processors, with extensive examples Details of Explicitly Parallel Instruction Computing (EPIC): Instruction set, addressing, register stack engine, predication, I/O, procedure calls, floating-point operations, and more Learn how to comprehend and optimize open source, Intel, and HP-UX compiler output Understand the full power of 64-bit Itanium EPIC processors Itanium(R) Architecture for Programmers is a comprehensive introduction to the breakthrough capabilities of the new 64-bit Itanium architecture. Using standard command-line tools and extensive examples, the authors illuminate the Itanium design within the broader context of contemporary computer architecture via a step-by-step investigation of Itanium assembly language. Coverage includes: The potential of Explicitly Parallel Instruction Computing (EPIC) Itanium instruction formats and addressing modes Innovations such as the register stack engine (RSE) and extensive predication Procedure calls and procedure-calling mechanisms Floating-point operations I/O techniques, from simple debugging to the use of files Optimization of output from open source, Intel, and HP-UX compilers An essential resource for both computing professionals and students of architecture or assembly language, Itanium Architecture for Programmers includes extensive printed and Web-based references, plus many numeric, essay, and programming exercises for each chapter.