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ULSI Process Integration 6 covers all aspects of process integration. Sections are devoted to 1) Device Technologies, 2) Front-end-of-line integration (gate stacks, shallow junctions, dry etching, etc.), 3) Back-end-of-line integration (CMP, low-k, Cu interconnect, air-gaps, 3D packaging, etc.), 4) Alternative channel technologies (Ge, III-V, hybrid integration), and 5) Emerging technologies (CNT, graphene, polymer electronics, nanotubes).
The symposium provided a forum for reviewing and discussing all aspects of process integration, with special focus on nanoscaled technologies, 65 nm and beyond on DRAM, SRAM, flash memory, high density logic-low power, RF, mixed analog-digital, process integration yield, CMP chemistries, low-k processes, gate stacks, metal gates, rapid thermal processing, silicides, copper interconnects, carbon nanotubes, novel materials, high mobility substrates (SOI, sSi, SiGe, GeOI), strain engineering, and hybrid integration.
This volume contains papers on the following: CMOS devices and devices based on compound semiconductors; processing; silicon integrated technology and integrated circuit design; quantum physics; nanotechnology; nanodevices, sensors and microsystems. The latest news and future challenges in these fields are presented in invited papers.
This volume contains papers on the following: CMOS devices and devices based on compound semiconductors; processing; silicon integrated technology and integrated circuit design; quantum physics; nanotechnology; nanodevices, sensors and microsystems. The latest news and future challenges in these fields are presented in invited papers.