Download Free Thermal And Electrical Parasitic Modeling For Multi Chip Power Module Layout Synthesis Book in PDF and EPUB Free Download. You can read online Thermal And Electrical Parasitic Modeling For Multi Chip Power Module Layout Synthesis and write the review.

This thesis presents thermal and electrical parasitic modeling approaches for layout synthesis of Multi-Chip Power Modules (MCPMs). MCPMs integrate power semiconductor devices and drive electronics into a single package. As the switching frequency of power devices increases, the size of the passive components are greatly reduced leading to gains in efficiency and cost reduction. In order to increase switching frequency, electrical parasitics in MCPMs need to be reduced through tighter electronic integrations and smaller packages. As package size is decreased, temperature increases due to less heat dissipation capability. Thus, it is crucial to consider both thermal and electrical parasitics in order to avoid premature device failure. Traditionally, the evaluation of the temperature and electrical parasitics of an MCPM requires the layout to be changed iteratively by hand and verified via finite element analysis (FEA) tools. The novel thermal and electrical parasitics models developed in this thesis predict temperature and electrical parasitics of an MCPM according to varied layouts. Multi-Objective optimization methods are applied to the models to find optimal layouts and tradeoffs of MCPM layouts.
This book presents physics-based electro-thermal models of bipolar power semiconductor devices including their packages, and describes their implementation in MATLAB and Simulink. It is a continuation of our first book Modeling of Bipolar Power Semiconductor Devices. The device electrical models are developed by subdividing the devices into different regions and the operations in each region, along with the interactions at the interfaces, are analyzed using the basic semiconductor physics equations that govern device behavior. The Fourier series solution is used to solve the ambipolar diffusion equation in the lightly doped drift region of the devices. In addition to the external electrical characteristics, internal physical and electrical information, such as junction voltages and carrier distribution in different regions of the device, can be obtained using the models. The instantaneous dissipated power, calculated using the electrical device models, serves as input to the thermal model (RC network with constant and nonconstant thermal resistance and thermal heat capacity, or Fourier thermal model) of the entire module or package, which computes the junction temperature of the device. Once an updated junction temperature is calculated, the temperature-dependent semiconductor material parameters are re-calculated and used with the device electrical model in the next time-step of the simulation. The physics-based electro-thermal models can be used for optimizing device and package design and also for validating extracted parameters of the devices. The thermal model can be used alone for monitoring the junction temperature of a power semiconductor device, and the resulting simulation results used as an indicator of the health and reliability of the semiconductor power device.
Wide Bandgap Power Semiconductor Packaging: Materials, Components, and Reliability addresses the key challenges that WBG power semiconductors face during integration, including heat resistance, heat dissipation and thermal stress, noise reduction at high frequency and discrete components, and challenges in interfacing, metallization, plating, bonding and wiring. Experts on the topic present the latest research on materials, components and methods of reliability and evaluation for WBG power semiconductors and suggest solutions to pave the way for integration. As wide bandgap (WBG) power semiconductors, SiC and GaN, are the latest promising electric conversion devices because of their excellent features, such as high breakdown voltage, high frequency capability, and high heat-resistance beyond 200 C, this book is a timely resource on the topic. Examines the key challenges of wide bandgap power semiconductor packaging at various levels, including materials, components and device performance Provides the latest research on potential solutions, with an eye towards the end goal of system integration Discusses key problems, such as thermal management, noise reduction, challenges in interconnects and substrates
The design of power converters relies on computer modeling to accurately predict system electrical and thermal behavior prior to implementation. In the field of wide bandgap semiconductors, the extraordinarily high switching speed of silicon-carbide devices dictates that traditionally inconsequential parasitic elements can impact system level behavior. This is especially true for systems implementing multi-chip power modules. To ensure accurate simulations, a new and precise methodology for modeling these systems is needed. This thesis formulates a measurement based and empirically-validated methodology for modeling wide bandgap power modules. First, impedance analysis is used to create a parasitic model of the power module's frequency domain behavior. Second, double pulse testing is implemented to characterize the dynamic behavior of the power module. Next, a SPICE model is developed from the frequency and time domain measurements. Finally, the model is validated through its accurate prediction of time domain waveforms and switching losses.
Conceptual Design of Multichip Modules and Systems treats activities which take place at the conceptual and specification level of the design of complex multichip systems. These activities include the formalization of design knowledge (information modeling), tradeoff analysis, partitioning, and decision process capture. All of these functions occur prior to the traditional CAD activities of synthesis and physical design. Inherent in the design of electronic modules are tradeoffs which must be understood before feasible technology, material, process, and partitioning choices can be selected. The lack of a complete set of technology information is an especially serious problem in the packaging and interconnect field since the number of technologies, process, and materials is substantial and selecting optimums is arduous and non-trivial if one truly wants a balance in cost and performance. Numerous tradeoff and design decisions have to be made intelligently and quickly at the beginning of the design cycle before physical design work begins. These critical decisions, made within the first 10% of the total design cycle, ultimately define up to 80% of the final product cost. Conceptual Design of Multichip Modules and Systems lays the groundwork for concurrent estimation level analysis including size, routing, electrical performance, thermal performance, cost, reliability, manufacturability, and testing. It will be useful both as a reference for system designers and as a text for those wishing to gain a perspective on the nature of packaging and interconnect design, concurrent engineering, computer-aided design, and system synthesis.
Silicon carbide (SiC), a wide-bandgap semiconductor material, greatly improves the performance of power semiconductor devices. Its electrical characteristics have a positive impact on the size, efficiency, and weight of the power electronics systems. Parasitic circuit elements and thermal properties are critical to the power electronics module design. This thesis investigates the various aspects of layout design, electrical simulation, thermal simulation, and peripheral design of SiC power electronic modules. ANSYS simulator was used to design and simulate the power electronic modules. The parasitic circuit elements of the power module were obtained from the device parameters given in the datasheet of these SiC bare devices together with the model established in the Q3D simulator. A temperature simulation model is established using SolidWorks to investigate the thermal performance of the power module. The designs of soldering and sintering fixtures are presented. A 1.7kV silicon carbide (SiC) junction field-effect transistor (JFET) cascode power electronic module was designed as an example. By comparing the different module designs, some conclusions are elucidated.
The accelerating commercialization of wide bandgap technology has led to increased demand for accurate circuit-level simulation models of devices such as Silicon-Carbide (SiC) MOSFET power modules. These models assist with optimizing systems to minimize overshoot and electromagnetic interference (EMI) associated with wide bandgap (WBG) switching conditions. As a result, capturing these behaviors requires more detailed and advanced modeling and characterization techniques than traditional Silicon (Si) semiconductors. These advancements include improvements to the parasitic package model, transistor characterization, and computational efficiency of the synthesized model. In this dissertation, a commercially available half-bridge SiC power module is characterized and modeled in SPICE. Simulation and empirical characterization techniques are used to quantify the packaging parasitics of the module. These parasitics include self-inductances, mutual coupling terms, and baseplate capacitances (BPC) that are sensitive to the high di/dt and dv/dt events that occur during switching transitions. The simulation predictions and empirical measurements are used to cross-validate each other and determine the preferred method for quantifying each parasitic parameter. The SiC transistors are characterized using a combination of commercial equipment and custom measurement techniques. The characterization process is described in detail and sensitivities are uncovered in that are crucial to the modeling effort. The characterization includes an advanced conduction analysis (ACA) system that combined with a self-heating removal algorithm is capable of quantifying the short-channel behavior of the device at high voltage. Finally, the package model and SiC MOSFET characteristics are used to synthesize a compact behavioral model. The model is evaluated in terms of its accuracy through comparison of quantitative error metrics across a wide range of double pulse test (DPT) operating conditions. The model is also evaluated in a multi-level inverter simulation to determine its computational efficiency and convergence behavior. It is shown that the model is highly accurate across the selected range of operating conditions and is capable of converging quickly in complex circuit topologies.
A dynamic electrical-thermal modeling simulation technique was developed to allow up-front design of thermal and electronic packaging with a high degree of accuracy and confidence. We are developing a hybrid multichip module output driver which controls with power MOSFET driver circuits. These MOSFET circuits will dissipate from 13 to 26 watts per driver in a physical package less than two square inches. The power dissipation plus an operating temperature range of -55° C to 100° C makes an accurate thermal package design critical. The project goal was to develop a simulation process to dynamically model the electrical/thermal characteristics of the power MOSFETS using the SABER analog simulator and the ABAQUS finite element simulator. SABER would simulate the electrical characteristics of the multi-chip module design while co-simulation is being done with ABAQUS simulating the solid model thermal characteristics of the MOSFET package. The dynamic parameters, MOSFET power and chip temperature, would be actively passed between simulators to effect a coupled simulator modelling technique. The project required a development of a SABER late for the analog ASIC controller circuit, a dynamic electrical/thermal template for the IRF150 and IRF9130 power MOSFETs, a solid model of the multi-chip module package, FORTRAN code to handle I/Q between and HP755 workstation and SABER, and I/O between CRAY J90 computer and ABAQUS. The simulation model was certified by measured electrical characteristics of the circuits and real time thermal imaging of the output multichip module.
This report results from a contract tasking Technical University of Budapest Department of Electron Devices as follows: The contractor will investigate the issues and problems of coupled electro-thermal M & S of Mixed Technology Multichip Modules (MT-MCMs). MT-MCMs for this project will be defined as a mixtures of high performance computing, microelectromechanical systems, and microfluidic systems. The use of M & S will be investigated for each of the generic steps of the design process flow as shown in the proposal. The contractor will determine the most cost effective M & S approach for each step in the design process. The possibilities of integrating the existing fast and accurate design tools of TUB into the AFRL design flow have to be investigated, and the optimal M & S approach determined.