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This book starts with background concerning three-dimensional integration - including their low energy consumption and high speed image processing - and then proceeds to how to construct them and which materials to use in particular situations. The book covers numerous applications, including next generation smart phones, driving assistance systems, capsule endoscopes, homing missiles, and many others. The book concludes with recent progress and developments in three dimensional packaging, as well as future prospects.
Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and systems, application of novel materials for 3D systems, and the thermal challenges to restrict power dissipation and improve performance of 3D systems. Containing contributions from experts in industry as well as academia, this authoritative text: Illustrates different 3D integration approaches, such as die-to-die, die-to-wafer, and wafer-to-wafer Discusses the use of interposer technology and the role of Through-Silicon Vias (TSVs) Presents the latest improvements in three major fields of thermal management for multiprocessor systems-on-chip (MPSoCs) Explores ThruChip Interface (TCI), NAND flash memory stacking, and emerging applications Describes large-scale integration testing and state-of-the-art low-power testing solutions Complete with experimental results of chip-level 3D integration schemes tested at IBM and case studies on advanced complementary metal–oxide–semiconductor (CMOS) integration for 3D integrated circuits (ICs), Design of 3D Integrated Circuits and Systems is a practical reference that not only covers a wealth of design issues encountered in 3D integration but also demonstrates their impact on the efficiency of 3D systems.
The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.
A pragmatic approach to testing electronic systems As we move ahead in the electronic age, rapid changes in technology pose an ever-increasing number of challenges in testing electronic products. Many practicing engineers are involved in this arena, but few have a chance to study the field in a systematic way-learning takes place on the job. By covering the fundamental disciplines in detail, Principles of Testing Electronic Systems provides design engineers with the much-needed knowledge base. Divided into five major parts, this highly useful reference relates design and tests to the development of reliable electronic products; shows the main vehicles for design verification; examines designs that facilitate testing; and investigates how testing is applied to random logic, memories, FPGAs, and microprocessors. Finally, the last part offers coverage of advanced test solutions for today's very deep submicron designs. The authors take a phenomenological approach to the subject matter while providing readers with plenty of opportunities to explore the foundation in detail. Special features include: * An explanation of where a test belongs in the design flow * Detailed discussion of scan-path and ordering of scan-chains * BIST solutions for embedded logic and memory blocks * Test methodologies for FPGAs * A chapter on testing system on a chip * Numerous references
Many cutting-edge computer and electronic products are powered by advanced Systems-on-Chip (SoC). Advanced SoCs encompass superb performance together with large number of functions. This is achieved by efficient integration of huge number of transistors. Such very large scale integration is enabled by a core-based design paradigm as well as deep-submicron and 3D-stacked-IC technologies. These technologies are susceptible to reliability and testing complications caused by thermal issues. Three crucial thermal issues related to temperature variations, temperature gradients, and temperature cycling are addressed in this thesis. Existing test scheduling techniques rely on temperature simulations to generate schedules that meet thermal constraints such as overheating prevention. The difference between the simulated temperatures and the actual temperatures is called temperature error. This error, for past technologies, is negligible. However, advanced SoCs experience large errors due to large process variations. Such large errors have costly consequences, such as overheating, and must be taken care of. This thesis presents an adaptive approach to generate test schedules that handle such temperature errors. Advanced SoCs manufactured as 3D stacked ICs experience large temperature gradients. Temperature gradients accelerate certain early-life defect mechanisms. These mechanisms can be artificially accelerated using gradient-based, burn-in like, operations so that the defects are detected before shipping. Moreover, temperature gradients exacerbate some delay-related defects. In order to detect such defects, testing must be performed when appropriate temperature-gradients are enforced. A schedule-based technique that enforces the temperature-gradients for burn-in like operations is proposed in this thesis. This technique is further developed to support testing for delay-related defects while appropriate gradients are enforced. The last thermal issue addressed by this thesis is related to temperature cycling. Temperature cycling test procedures are usually applied to safety-critical applications to detect cycling-related early-life failures. Such failures affect advanced SoCs, particularly through-silicon-via structures in 3D-stacked-ICs. An efficient schedule-based cycling-test technique that combines cycling acceleration with testing is proposed in this thesis. The proposed technique fits into existing 3D testing procedures and does not require temperature chambers. Therefore, the overall cycling acceleration and testing cost can be drastically reduced. All the proposed techniques have been implemented and evaluated with extensive experiments based on ITC’02 benchmarks as well as a number of 3D stacked ICs. Experiments show that the proposed techniques work effectively and reduce the costs, in particular the costs related to addressing thermal issues and early-life failures. We have also developed a fast temperature simulation technique based on a closed-form solution for the temperature equations. Experiments demonstrate that the proposed simulation technique reduces the schedule generation time by more than half.
This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.
This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade. The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs). Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat. · Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; · Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; · Provides step-by-step solutions for detecting different types of counterfeit ICs; · Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC detection and avoidance, for industry and government.
For a one-semester senior or beginning graduate level course in power system dynamics. This text begins with the fundamental laws for basic devices and systems in a mathematical modeling context. It includes systematic derivations of standard synchronous machine models with their fundamental controls. These individual models are interconnected for system analysis and simulation. Singular perturbation is used to derive and explain reduced-order models.
The Electronic Device Failure Analysis Society proudly announces the Seventh Edition of the Microelectronics Failure Analysis Desk Reference, published by ASM International. The new edition will help engineers improve their ability to verify, isolate, uncover, and identify the root cause of failures. Prepared by a team of experts, this updated reference offers the latest information on advanced failure analysis tools and techniques, illustrated with numerous real-life examples. This book is geared to practicing engineers and for studies in the major area of power plant engineering. For non-metallurgists, a chapter has been devoted to the basics of material science, metallurgy of steels, heat treatment, and structure-property correlation. A chapter on materials for boiler tubes covers composition and application of different grades of steels and high temperature alloys currently in use as boiler tubes and future materials to be used in supercritical, ultra-supercritical and advanced ultra-supercritical thermal power plants. A comprehensive discussion on different mechanisms of boiler tube failure is the heart of the book. Additional chapters detailing the role of advanced material characterization techniques in failure investigation and the role of water chemistry in tube failures are key contributions to the book.