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This book introduces readers to various radiation soft-error mechanisms such as soft delays, radiation induced clock jitter and pulses, and single event (SE) coupling induced effects. In addition to discussing various radiation hardening techniques for combinational logic, the author also describes new mitigation strategies targeting commercial designs. Coverage includes novel soft error mitigation techniques such as the Dynamic Threshold Technique and Soft Error Filtering based on Transmission gate with varied gate and body bias. The discussion also includes modeling of SE crosstalk noise, delay and speed-up effects. Various mitigation strategies to eliminate SE coupling effects are also introduced. Coverage also includes the reliability of low power energy-efficient designs and the impact of leakage power consumption optimizations on soft error robustness. The author presents an analysis of various power optimization techniques, enabling readers to make design choices that reduce static power consumption and improve soft error reliability at the same time.
This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
This book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section.
This book contains extended and revised versions of the best papers presented during the fourteenth IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration. This conference provides a forum to exchange ideas and show industrial and academic research results in microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels.
Space applications, nuclear physics, military operations, medical imaging, and especially electronics (modern silicon processing) are obvious fields in which radiation damage can have serious consequences, i.e., degradation of MOS devices and circuits. Zeroing in on vital aspects of this broad and complex topic, Radiation Effects in Semiconductors addresses the ever-growing need for a clear understanding of radiation effects on semiconductor devices and circuits to combat potential damage it can cause. Features a chapter authored by renowned radiation authority Lawrence T. Clark on Radiation Hardened by Design SRAM Strategies for TID and SEE Mitigation This book analyzes the radiation problem, focusing on the most important aspects required for comprehending the degrading effects observed in semiconductor devices, circuits, and systems when they are irradiated. It explores how radiation interacts with solid materials, providing a detailed analysis of three ways this occurs: Photoelectric effect, Compton effect, and creation of electron-positron pairs. The author explains that the probability of these three effects occurring depends on the energy of the incident photon and the atomic number of the target. The book also discusses the effects that photons can have on matter—in terms of ionization effects and nuclear displacement Written for post-graduate researchers, semiconductor engineers, and nuclear and space engineers with some electronics background, this carefully constructed reference explains how ionizing radiation is creating damage in semiconducting devices and circuits and systems—and how that damage can be avoided in areas such as military/space missions, nuclear applications, plasma damage, and X-ray-based techniques. It features top-notch international experts in industry and academia who address emerging detector technologies, circuit design techniques, new materials, and innovative system approaches.
This book provides a detailed treatment of radiation effects in electronic devices, including effects at the material, device, and circuit levels. The emphasis is on transient effects caused by single ionizing particles (single-event effects and soft errors) and effects produced by the cumulative energy deposited by the radiation (total ionizing dose effects). Bipolar (Si and SiGe), metalOCooxideOCosemiconductor (MOS), and compound semiconductor technologies are discussed. In addition to considering the specific issues associated with high-performance devices and technologies, the book includes the background material necessary for understanding radiation effects at a more general level. Contents: Single Event Effects in Avionics and on the Ground (E Normand); Soft Errors in Commercial Integrated Circuits (R C Baumann); System Level Single Event Upset Mitigation Strategies (W F Heidergott); Space Radiation Effects in Optocouplers (R A Reed et al.); The Effects of Space Radiation Exposure on Power MOSFETs: A Review (K Shenai et al.); Total Dose Effects in Linear Bipolar Integrated Circuits (H J Barnaby); Hardness Assurance for Commercial Microelectronics (R L Pease); Switching Oxide Traps (T R Oldham); Online and Realtime Dosimetry Using Optically Stimulated Luminescence (L Dusseau & J Gasiot); and other articles. Readership: Practitioners, researchers, managers and graduate students in electrical and electronic engineering, semiconductor science and technology, and microelectronics."
This book provides a comprehensive presentation of the most advanced research results and technological developments enabling understanding, qualifying and mitigating the soft errors effect in advanced electronics, including the fundamental physical mechanisms of radiation induced soft errors, the various steps that lead to a system failure, the modelling and simulation of soft error at various levels (including physical, electrical, netlist, event driven, RTL, and system level modelling and simulation), hardware fault injection, accelerated radiation testing and natural environment testing, soft error oriented test structures, process-level, device-level, cell-level, circuit-level, architectural-level, software level and system level soft error mitigation techniques. The book contains a comprehensive presentation of most recent advances on understanding, qualifying and mitigating the soft error effect in advanced electronic systems, presented by academia and industry experts in reliability, fault tolerance, EDA, processor, SoC and system design, and in particular, experts from industries that have faced the soft error impact in terms of product reliability and related business issues and were in the forefront of the countermeasures taken by these companies at multiple levels in order to mitigate the soft error effects at a cost acceptable for commercial products. In a fast moving field, where the impact on ground level electronics is very recent and its severity is steadily increasing at each new process node, impacting one after another various industry sectors (as an example, the Automotive Electronics Council comes to publish qualification requirements on soft errors), research and technology developments and industrial practices have evolve very fast, outdating the most recent books edited at 2004.
Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines. This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture. - Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors - Shows readers how to quantify their soft error reliability - Provides state-of-the-art techniques to protect against soft errors
Unfriendly to conventional electronic devices, circuits, and systems, extreme environments represent a serious challenge to designers and mission architects. The first truly comprehensive guide to this specialized field, Extreme Environment Electronics explains the essential aspects of designing and using devices, circuits, and electronic systems intended to operate in extreme environments, including across wide temperature ranges and in radiation-intense scenarios such as space. The Definitive Guide to Extreme Environment Electronics Featuring contributions by some of the world’s foremost experts in extreme environment electronics, the book provides in-depth information on a wide array of topics. It begins by describing the extreme conditions and then delves into a description of suitable semiconductor technologies and the modeling of devices within those technologies. It also discusses reliability issues and failure mechanisms that readers need to be aware of, as well as best practices for the design of these electronics. Continuing beyond just the "paper design" of building blocks, the book rounds out coverage of the design realization process with verification techniques and chapters on electronic packaging for extreme environments. The final set of chapters describes actual chip-level designs for applications in energy and space exploration. Requiring only a basic background in electronics, the book combines theoretical and practical aspects in each self-contained chapter. Appendices supply additional background material. With its broad coverage and depth, and the expertise of the contributing authors, this is an invaluable reference for engineers, scientists, and technical managers, as well as researchers and graduate students. A hands-on resource, it explores what is required to successfully operate electronics in the most demanding conditions.