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Wide Bandgap semiconductor devices offer higher efficiency, smaller size, less weight, and longer lifetime, with applications in power grid electronics and electromobility. This book describes the state of advanced packaging solutions for novel wide-band-gap semiconductors, specifically silicon carbide (SiC) MOSFETs and diodes.
Wide Bandgap semiconductor devices offer higher efficiency, smaller size, less weight, and longer lifetime, with applications in power grid electronics and electromobility. This book describes the state of advanced packaging solutions for novel wide-band-gap semiconductors, specifically silicon carbide (SiC) MOSFETs and diodes.
With the benefits of fast switching speed, low on-resistance and high thermal conductivity, silicon carbide (SiC) devices are being implemented in converter designs with high efficiency and high power density. Consequently, SiC power modules are needed. However, some of the preestablished package designs for silicon based power modules are not suitable to manifest the advantages of SiC devices. Therefore, this thesis aims at optimizing the package design to utilize the fast switching capability of SiC devices. First, the power loop parasitic inductance induced by the package can lead to large voltage spikes with the fast switching SiC device. It can potentially exceed the device's voltage ratings and affect its safe operation. Second, to achieve high power density design with SiC devices, the package's cooling performance needs to be improved. Third, to design a package for high current applications with multiple chips in parallel, a proper scaling method is needed to ensure all the devices undertake the same voltage stress in switching transients. For P-cell/N-cell designs with split scaling, a new parasitic parameter, namely, middle-point parasitic inductance Lm̳i̳d̳d̳l̳e̳ will be introduced. Its role should be understood. Lastly, the unbalanced dynamic switching loss can lead to different state junction temperatures among paralleled devices. Thermal coupling can help to reduce the temperature imbalance, and its role should be quantitatively investigated. To meet the first two requirements, a new package design is proposed with reduced parasitic inductance and double-sided cooling. Compared to a baseline package, more than 60% reduction of parasitic inductance is achieved. The middle-point parasitic inductance's effect on device's switching transients is analyzed in the frequency domain. Then a dedicated power module is fabricated with the capability of varying Lm̳i̳d̳d̳l̳e̳. Experiment results show that as Lm̳i̳d̳d̳l̳e̳ increases, different voltage stresses are imposed on the MOSFET and anti-parallel diode. Electrothermal simulations are implemented to investigate steady state junction temperatures of paralleled devices considering unbalanced switching losses at different thermal coupling conditions. It is observed that both devices' junction temperatures will increase as the coupling coefficient is increased. However, the junction temperature imbalance will decrease. This is verified by the experiment result.
Silicon Carbide (SiC) power devices become popular in electric/hybrid vehicles, energy storage power converters, high power industrial converters, locomotive traction drives and electric aircrafts. Compared with its silicon counterparts, SiC metal oxide semiconductor field effect transistors (MOSFETs) feature higher blocking voltage, higher operating temperature, higher thermal conductivity, faster switching speed, and lower switching loss. This dissertation studies the medium voltage SiC power switch design, packaging, reliability testing and protection, aiming to achieve high power density low cost design with improved reliability. This work first investigates medium voltage SiC MOSFET short circuit capability and degradation under short circuit events. Lower short circuit energy is an effective approach to protect the medium voltage SiC MOSFET from catastrophic failure and slow down the device degradation under repeated over-current conditions. To ensure high efficiency operation under normal conditions and effective protection under short circuit condition, a three-step short circuit protection method is proposed. With ultra-fast detection, the protection scheme can quickly respond to the short circuit events and actively lower the device gate voltage to enhance its short circuit capability. Eventually, the conventional desaturation protection circuits confirm the faulty condition and softly turns off the device. Based on the 3300 V SiC MOSFET characteristic and circuit parameters, the protection circuit design guideline is provided. The exploration on the medium voltage SiC MOSFET packaging follows. To further increase the power density, the medium voltage SiC device packaging becomes a multi-disciplinary subject involving electrical, thermal, and mechanical design. Multi-functional package components are desired to deal with more than one concerns in the application. The relationship between electrical, thermal, and mechanical properties needs to be understood and carefully designed to achieve a fully integrated high-performance power module. The adoption of ceramic baseplate is assessed in the aspects of the insulation design, the thermal design, the power loop layout, the electromagnetic interference considerations, respectively. Mathematical models, simulations, and experimental results are presented to verify the analysis. The adoption of the medium voltage SiC MOSFETs in the various application is slowed by its unclear long-term reliability and high cost. The reliability issue can be mitigated by the aforementioned three-step protection method. An economic alternative for medium voltage power switch is the super-cascode structure. The super-cascode structure is composed of series connected low voltage MOSFET and normally-on junction gate field-effect transistors (JFETs). The voltage balancing among series connected devices is realized by the added capacitors and diodes. Circuit models during the switching transients are built. Based on the developed models, a method to optimize the voltage balancing circuit parameters is proposed. The analysis and optimization method are verified by the experimental results. Sensitivity analysis is conducted to see the impact of the capacitance tolerance. Conclusions and recommendations for future work are presented at the end of this dissertation.
Wide Bandgap Semiconductor Power Devices: Materials, Physics, Design and Applications provides readers with a single resource on why these devices are superior to existing silicon devices. The book lays the groundwork for an understanding of an array of applications and anticipated benefits in energy savings. Authored by the Founder of the Power Semiconductor Research Center at North Carolina State University (and creator of the IGBT device), Dr. B. Jayant Baliga is one of the highest regarded experts in the field. He thus leads this team who comprehensively review the materials, device physics, design considerations and relevant applications discussed. Comprehensively covers power electronic devices, including materials (both gallium nitride and silicon carbide), physics, design considerations, and the most promising applications Addresses the key challenges towards the realization of wide bandgap power electronic devices, including materials defects, performance and reliability Provides the benefits of wide bandgap semiconductors, including opportunities for cost reduction and social impact
A modern power electronic module can save significant energy usage in the power electronic systems by improving their switching efficiencies. One way to improve the efficiency of the power electronic module is to reduce its parasitic circuit elements. The purpose of this thesis is to investigate the mitigation of parasitic circuit elements in power electronic modules. General methods of mitigating parasitic inductances were analyzed by the Q3D Extractor and verified by the time-domain reflectometry (TDR) measurements. In most cases, the TDR measurement results closely matched those predicted by the Q3D Extractor. These methods were applied to design and analyze a 50KVA 650V silicon carbide (SiC) half-bridge power electronic power module consisting of three separate power substrates interconnected in parallel. The layout of this power module was constrained by the existing module housing. The parasitic inductances of the power module substrates were measured by TDR, and compared to those simulated values by the Q3D Extractor. Due to the differences in the lengths of current paths, the parasitic circuit elements for the three paralleled SiC power substrates, each consisting of 10 SiC power MOSFETs and 9 SiC diodes, were different.
Silicon carbide (SiC) metal–oxide–semiconductor field effect transistors (MOSFETs) have seen rapid growth in recent years, thanks to its low conduction loss, fast switching speed, and good thermal conductivity. For high power applications, it is necessary to parallel two or more devices in order to achieve the desired current rating, conduction loss, and thermal performance. Traditional single-driver multi-chip module (SDM) requires strong drivers and suffers a lot from parasitic parameter mismatch induced transient current unbalance and intrinsic oscillation. To reduce the thermal imbalance and operation risks, the switching speeds of parallel MOSFETs or MOSFET modules in general are usually slowed with larger gate resistance, at the expense of higher switching loss. Therefore, this solution is not optimal since it indicates a poor utilization of the SiC MOSFET’s intrinsic high-speed capability. The research developed analytical models for the transient current sharing and inherent oscillation for two paralleled SiC MOSFETs’ switching process. The transient current sharing model is developed based on linearized circuit state equations, while the intrinsic oscillation model is based on small-signal equivalent circuits. By using these models, the influences of parasitic parameters are investigated. The optimized gate resistor selection to compensate circuit mismatches is discussed. Based on the studies and models, a 650 V, 300 A double-side cooling GaN HEMT based SDM is designed and fabricated. A better configuration of the multi-driver multi-chip module (MDM) is proposed and the performances are compared. The analytical models provide a fast way to evaluate and optimize the design or approach of any paralleled MOSFET cases. The proposed MDM solution could be a more efficient, more reliable power module design configuration. The parameter influence and comparison results were verified in the experimental tests
Silicon carbide (SiC), a wide-bandgap semiconductor material, greatly improves the performance of power semiconductor devices. Its electrical characteristics have a positive impact on the size, efficiency, and weight of the power electronics systems. Parasitic circuit elements and thermal properties are critical to the power electronics module design. This thesis investigates the various aspects of layout design, electrical simulation, thermal simulation, and peripheral design of SiC power electronic modules. ANSYS simulator was used to design and simulate the power electronic modules. The parasitic circuit elements of the power module were obtained from the device parameters given in the datasheet of these SiC bare devices together with the model established in the Q3D simulator. A temperature simulation model is established using SolidWorks to investigate the thermal performance of the power module. The designs of soldering and sintering fixtures are presented. A 1.7kV silicon carbide (SiC) junction field-effect transistor (JFET) cascode power electronic module was designed as an example. By comparing the different module designs, some conclusions are elucidated.
MEMS devices are found in many of today’s electronic devices and systems, from air-bag sensors in cars to smart phones, embedded systems, etc. Increasingly, the reduction in dimensions has led to nanometer-scale devices, called NEMS. The plethora of applications on the commercial market speaks for itself, and especially for the highly precise manufacturing of silicon-based MEMS and NEMS. While this is a tremendous achievement, silicon as a material has some drawbacks, mainly in the area of mechanical fatigue and thermal properties. Silicon carbide (SiC), a well-known wide-bandgap semiconductor whose adoption in commercial products is experiening exponential growth, especially in the power electronics arena. While SiC MEMS have been around for decades, in this Special Issue we seek to capture both an overview of the devices that have been demonstrated to date, as well as bring new technologies and progress in the MEMS processing area to the forefront. Thus, this Special Issue seeks to showcase research papers, short communications, and review articles that focus on: (1) novel designs, fabrication, control, and modeling of SiC MEMS and NEMS based on all kinds of actuation mechanisms; and (2) new developments in applying SiC MEMS and NEMS in consumer electronics, optical communications, industry, medicine, agriculture, space, and defense.