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From my B.E.E degree at the University of Minnesota and right through my S.M. degree at M.I.T., I had specialized in solid state devices and microelectronics. I made the decision to switch to computer-aided design (CAD) in 1981, only a year or so prior to the introduction of the simulated annealing algorithm by Scott Kirkpatrick, Dan Gelatt, and Mario Vecchi of the IBM Thomas 1. Watson Research Center. Because Prof. Alberto Sangiovanni-Vincentelli, my UC Berkeley advisor, had been a consultant at IBM, I re ceived a copy of the original IBM internal report on simulated annealing approximately the day of its release. Given my background in statistical mechanics and solid state physics, I was immediately impressed by this new combinatorial optimization technique. As Prof. Sangiovanni-Vincentelli had suggested I work in the areas of placement and routing, it was in these realms that I sought to explore this new algorithm. My flJ'St implementation of simulated annealing was for an island-style gate array placement problem. This work is presented in the Appendix of this book. I was quite struck by the effect of a nonzero temperature on what otherwise appears to be a random in terchange algorithm.
Written by hundreds experts who have made contributions to both enterprise and academics research, these excellent reference books provide all necessary knowledge of the whole industrial chain of integrated circuits, and cover topics related to the technology evolution trends, fabrication, applications, new materials, equipment, economy, investment, and industrial developments of integrated circuits. Especially, the coverage is broad in scope and deep enough for all kind of readers being interested in integrated circuit industry. Remarkable data collection, update marketing evaluation, enough working knowledge of integrated circuit fabrication, clear and accessible category of integrated circuit products, and good equipment insight explanation, etc. can make general readers build up a clear overview about the whole integrated circuit industry. This encyclopedia is designed as a reference book for scientists and engineers actively involved in integrated circuit research and development field. In addition, this book provides enough guide lines and knowledges to benefit enterprisers being interested in integrated circuit industry.
Electronics has become the largest industry, surpassing agriCUlture, auto. and heavy metal industries. It has become the industry of choice for a country to prosper, already having given rise to the phenomenal prosperity of Japan. Korea. Singapore. Hong Kong. and Ireland among others. At the current growth rate, total worldwide semiconductor sales will reach $300B by the year 2000. The key electronic technologies responsible for the growth of the industry include semiconductors. the packaging of semiconductors for systems use in auto, telecom, computer, consumer, aerospace, and medical industries. displays. magnetic, and optical storage as well as software and system technologies. There has been a paradigm shift, however, in these technologies. from mainframe and supercomputer applications at any cost. to consumer applications at approximately one-tenth the cost and size. Personal computers are a good example. going from $500IMIP when products were first introduced in 1981, to a projected $lIMIP within 10 years. Thin. light portable. user friendly and very low-cost are. therefore. the attributes of tomorrow's computing and communications systems. Electronic packaging is defined as interconnection. powering, cool ing, and protecting semiconductor chips for reliable systems. It is a key enabling technology achieving the requirements for reducing the size and cost at the system and product level.
Evolutionary algorithms are general-purpose search procedures based on the mechanisms of natural selection and population genetics. They are appealing because they are simple, easy to interface, and easy to extend. This volume is concerned with applications of evolutionary algorithms and associated strategies in engineering. It will be useful for engineers, designers, developers, and researchers in any scientific discipline interested in the applications of evolutionary algorithms. The volume consists of five parts, each with four or five chapters. The topics are chosen to emphasize application areas in different fields of engineering. Each chapter can be used for self-study or as a reference by practitioners to help them apply evolutionary algorithms to problems in their engineering domains.
Our purpose in writing this book was two-fold. First, we wanted to compile a chronology of the research in the field of mixed-mode simulation over the last ten to fifteen years. A substantial amount of work was done during this period of time but most of it was published in archival form in Masters theses and Ph. D. dissertations. Since the interest in mixed-mode simulation is growing, and a thorough review of the state-of-the-art in the area was not readily available, we thought it appropriate to publish the information in the form of a book. Secondly, we wanted to provide enough information to the reader so that a proto type mixed-mode simulator could be developed using the algorithms in this book. The SPLICE family of programs is based on the algorithms and techniques described in this book and so it can also serve as docu mentation for these programs. ACKNOWLEDGEMENTS The authors would like to dedicate this book to Prof. D. O. Peder son for inspiring this research work and for providing many years of support and encouragement The authors enjoyed many fruitful discus sions and collaborations with Jim Kleckner, Young Kim, Alberto Sangiovanni-Vincentelli, and Jacob White, and we thank them for their contributions. We also thank the countless others who participated in the research work and read early versions of this book. Lillian Beck provided many useful suggestions to improve the manuscript. Yun cheng Ju did the artwork for the illustrations.
It isn't that they can't see the solution. It is Approach your problems from the right end and begin with the answers. Then one day, that they can't see the problem. perhaps you will find the final question. O. K. Chesterton. The Scandal of Father 'The Hermit Clad in Crane Feathers' in R. Brown 'The point of a Pin'. van Oulik's The Chinese Maze Murders. Growing specialization and diversification have brought a host of monographs and textbooks or increasingly specialized topics. However, the "tree" of knowledg~ of mathematics and related fields does not grow only by putting forth new branches. It also ·happens, quite often in fact, that branches which were thought to be completely disparate are suddenly seen to be related. Further, the ~d and level of sophistication of mathematics applied in various sciences has changed drastically in recent years: measure theory is used (non-trivially) in regional and theoretical economics; algebraic geometry interacts with physics; the Minkowsky lemma, coding theory and the structure of water meet one another in packing and covering theory; quantum fields, crystal defects and mathematical programming profit from homotopy theory; Lie algebras are relevant to filtering; and prediction and electrical engineering can use Stein spaces. And in addition to this there are such new emerging subdisciplines as "experimental mathematics", "CFD", "completely integrable systems", "chaos, synergetics and large-scale order", which are almost impossible to fit into the existing classification schemes. They draw upon widely different sections of mathematics.
In the last few years CMOS technology has become increas ingly dominant for realizing Very Large Scale Integrated (VLSI) circuits. The popularity of this technology is due to its high den sity and low power requirement. The ability to realize very com plex circuits on a single chip has brought about a revolution in the world of electronics and computers. However, the rapid advance ments in this area pose many new problems in the area of testing. Testing has become a very time-consuming process. In order to ease the burden of testing, many schemes for designing the circuit for improved testability have been presented. These design for testability techniques have begun to catch the attention of chip manufacturers. The trend is towards placing increased emphasis on these techniques. Another byproduct of the increase in the complexity of chips is their higher susceptibility to faults. In order to take care of this problem, we need to build fault-tolerant systems. The area of fault-tolerant computing has steadily gained in importance. Today many universities offer courses in the areas of digital system testing and fault-tolerant computing. Due to the impor tance of CMOS technology, a significant portion of these courses may be devoted to CMOS testing. This book has been written as a reference text for such courses offered at the senior or graduate level. Familiarity with logic design and switching theory is assumed. The book should also prove to be useful to professionals working in the semiconductor industry.
Large computational resources are of ever increasing importance for the simulation of semiconductor processes, devices and integrated circuits. The Workshop on Computational Electronics was intended to be a forum for the dis cussion of the state-of-the-art of device simulation. Three major research areas were covered: conventional simulations, based on the drift-diffusion and the hydrodynamic models; Monte Carlo methods and other techniques for the solution of the Boltzmann transport equation; and computational approaches to quantum transport which are relevant to novel devices based on quantum interference and resonant tunneling phenomena. Our goal was to bring together researchers from various disciplines that contribute to the advancement of device simulation. These include Computer Sci ence, Electrical Engineering, Applied Physics and Applied Mathematics. The suc cess of this multidisciplinary formula was proven by numerous interactions which took place at the Workshop and during the following three-day Short Course on Computational Electronics. The format of the course, including a number of tutorial lectures, and the large attendance of graduate students, stimulated many discussions and has proven to us once more the importance of cross-fertilization between the different disciplines.
Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.