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This book describes advanced high frequency power MOSFET gate driver technologies, which serve a critical role between control and power devices. A gate driver is a power amplifier that accepts a low-power input from a controller integrated circuit and produces a high-current drive input for the gate of a high-power transistor such as a power MOSFET (metal-oxide-semiconductor field-effect transistor).
Low Voltage Power MOSFETs focuses on the design of low voltage power MOSFETs and the relation between the device structure and the performance of a power MOSFET used as a switch in power management applications. This SpringerBriefs close the gap between detailed engineering reference books and the numerous technical papers on the subject of power MOSFETs. The material presented covers low voltage applications extending from battery operated portable electronics, through point of load converters, internet infrastructure, automotive applications, to personal computers and server computers. The issues treated in this volume are explained qualitatively using schematic illustrations, making the discussion easy to follow for all prospective readers.
The development trend of power converters motivates the pursuit with high density, high efficiency, and low cost. Increasing the frequency can improve the power density and lead to small passive elements and a fast dynamic response. Each one of these power converters must be driven by a gate-drive circuit to operate efficiently. Conventional gate-drivers are used up to frequencies of about 5 MHz and suffer from switching losses. Therefore, the development of switch-mode power supplies (SMPS) operating at high frequencies requires high-speed gate drivers. The presented research in this dissertation focuses on analysis, design, and development of new types of resonant gate-drive circuits to drive power transistors at high frequencies. Three proposed topologies are presented in this dissertation. Two topologies are single-switch ZVS gate-drive circuits. The attractive features of the two circuits are : (a) suitable to drive a low-side power transistor, (b) capable of operating at high frequencies with quick turn-on and turn-off transitions, (c) low power loss due to zero-voltage switching in the driving switch, (d) a significant increase in gate-source voltage of the driven switch with respect to the input voltage, (e) small energy storage components, and (f) designed to operate at switching frequency 20 MHz and a supply voltage of 4 V. The third presented topology is a class-D resonant gate-drive circuit. A series resonant circuit is formed by the resonant inductor and the input capacitance of the MOSFET to achieve the charge and discharge process of the transistor input capacitance. The proposed circuit can be used as a gate-drive circuit to drive low-side or high-side power switches operating at 6.78 MHz. In each above topology, detailed steady-state operation and derived expressions for the steady-state waveforms are presented. The analysis includes predicted power loss expressions in circuit components to estimate the overall losses in the gate-drive circuits. A design procedure of the proposed gate drivers is developed. The simulations and experimental results are given to validate the theoretical analysis.Finally, in the last chapter of the dissertation, the behavior of an air-core inductor operating at high frequencies is investigated. An appropriate model for the inductor is introduced to represent the effect of high frequencies on the inductor's winding resistance. The analysis includes an expression to estimate the power loss in the air-core inductor. A detailed design methodology is presented to predict the dc and ac characteristic of the air-core inductor. A design example of an air-core inductor is given for switch-mode power gate driver operating at high frequencies.
This book provides analysis and discusses the design of various MOSFET technologies which are used for the design of Double-Pole Four-Throw (DP4T) RF switches for next generation communication systems. The authors discuss the design of the (DP4T) RF switch by using the Double-Gate (DG) MOSFET, as well as the Cylindrical Surrounding double-gate (CSDG) MOSFET. The effect of HFO2 (high dielectric material) in the design of DG MOSFET and CSDG MOSFET is also explored. Coverage includes comparison of Single-gate MOSFET and Double-gate MOSFET switching parameters, as well as testing of MOSFETs parameters using image acquisition.
Evolutions in integrated circuit technology require the use of a high-frequency synchronous buck converter in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency operation leads to increased power MOSFET switching losses. Optimization of the MOSFETs plays an important role in improving converter performance. This dissertation focuses on revealing the power loss mechanism of power MOSFETs and the relationship between power MOSFET structure and its power loss. The analytical device model, combined with circuit modeling, cannot reveal the relationship between device structure and its power loss due to the highly non-linear characteristics of power MOSFETs. A physically-based mixed device/circuit modeling approach is used to investigate the power losses of the MOSFETs under different operating conditions. The physically based device model, combined with SPICE-like circuit simulation, provides an expeditious and inexpensive way of evaluating and optimizing circuit and device concepts. Unlike analytical or other SPICE models of power MOSFETs, the numerical device model, relying little on approximations or simplifications, faithfully represents the behavior of realistic power MOSFETs. The impact of power MOSFET parameters on efficiency of synchronous buck converters, such as gate charge, on resistance, reverse recovery, is studied in detail in this thesis. The results provide a good indication on how to optimize power MOSFETs used in VRMs. The synchronous rectifier plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact SyncFET's performance. This thesis gives a detailed analysis of the SyncFET operation mechanism and provides several techniques to reduce its body-diode influence and suppress its false Cdv/dt trigger-n. This thesis also investigates the influence of several circuit level parameters on the efficiency of the synchronous buck converter, such as input voltage, circuit parasitic inductance, and gate resistance to provide further optimization of synchronous buck converter design.
Switching device power losses place critical limits on the design and performance of high-frequency integrated DC-DC converters. Especially, the layout of metal interconnects in lateral power MOSFETs has a profound effect on their on-resistances and conduction power losses. This thesis presents an analytical interconnect modeling and layout optimization technique for large-area power MOSFETs. The layout optimization of 24V LDMOS transistors in the area of 1 mm2 has achieved an improvement of 55 % in its on-resistance. The simulation result has been verified by experimental measurements on a test chip fabricated in TSMC 0.25 μm HV CMOS technology. In addition, this thesis presents an optimized output stage design methodology for the implementation of a 4 MHz, 12V to 1V integrated DC-DC converter. A segmented output stage scheme is employed to increase the converter efficiency at light load conditions. The peak efficiency of 84% was achieved at load current of 2 A.
Zero voltage switching technique has been popular in high voltage DC-DC converter design to increase the switching frequency while maintaining high power efficiency and thus reducing the volume of passive components. Recently, enhancement-mode GaN FETs attracts more and more attention in high voltage converters for better figure of merits in RDSON and QG compared with the traditional MOSFETs. Although GaN FETs have been used in soft-switched DC-DC converters to further improve the power efficiency and power density, GaN FETs can cause more power loss in the third quadrant conduction than traditional MOSFETs if the dead time is not precisely controlled. In addition, fast transition of GaN FETs requires the high-voltage level shifter handle much faster dv/dt without creating logic errors. This dissertation develops a novel GaN driver with adaptive dead time control scheme, based on an innovative methodology of slope-sensing ZVS detection to minimize the third quadrant conduction time of GaN FETs. Also, a differential-mode noise blanking scheme is proposed to increase the dv/dt noise immunity of the high voltage level shifter. The proposed GaN driver can help to reduce power loss by 1.6W and achieve 90.2% power efficiency at 150V input and 2MHz frequency, or 88.6% power efficiency at 400V input and 1MHz frequency. Traditional non-isolated ZVS converters utilize an auxiliary branch to assist soft-switching operation of the active FET. In multiphase topologies or non-inverting buck-boost topology, each active power FET requires an auxiliary branch such that the total number and volume of auxiliary components make the traditional ZVS scheme infeasible. This dissertation proposes a new passive-saving technique to share one auxiliary branch between two active FETs such that the total number and volume of auxiliary components can be reduced by 50%. It is worth to notice that the proposed passive-saving technique can be applied to both ZVS and ZVT topologies. Traditional ZVT converters adopted fixed on-time of the auxiliary switch for simplicity. Since the auxiliary current ripple cannot scale with the load current, power efficiency at light load condition is quite limited. This dissertation proposes a monolithic control loop to regulate the auxiliary current ripple according to load current. Compared with the traditional ZVT converters, the proposed converter with auxiliary current control scheme can improve light load efficiency by 14.5% without folding back switching frequency.
Conventional power converters contain semiconductor devices switching in the tens to hundreds of kilohertz (kHz) range. Extending the switching frequency to the multi-MHz range brings opportunities to reduce the size and weight of power converters as the energy storage requirements decrease. Additionally, MHz-frequency power converters and amplifiers enable new applications such as plasma generators for semiconductor processing equipment, medical sanitation, and CO2 reforming. Despite these promises and opportunities, building efficient power converters at much higher frequencies still poses a significant challenge. In MHz-frequencies, wide bandgap (WBG) semiconductor devices, such as gallium nitride (GaN) and silicon carbide (SiC), have the potential to improve the performance of these systems as they have orders of magnitude lower specific on-resistance compared to silicon (Si) devices. One of the main issues is the soft-switching Coss losses in WBG devices, which have not been previously well-studied and modeled in the literature, and these losses significantly degrade the efficiency of power converters. We present the measurement results and techniques to characterize the Coss losses in wide bandgap devices, as well as discuss the physical root causes of these losses in SiC power devices. In addition to the Coss losses, effectively utilizing SiC MOSFETs poses a challenge, as designing fast transitioning and low loss gate drivers at MHz frequencies is difficult. As a solution, we develop resonant gate drivers that can drive SiC MOSFETs up to 30 MHz while conserving over five times as much gating power compared to available commercial counterparts. Lastly, we utilize these WBG devices in broadband power amplifier demonstrations suitable for radiofrequency (RF) plasma generation applications at 13.56 MHz. To achieve high performance across broadband, we employ various RF circuit techniques including reactance compensation, phase-switched impedance modulation, and power combining. As a result, these amplifiers showcase some of the highest efficiencies published in the literature, including over 90% across a 4 MHz bandwidth for a 300 W system and over 95% efficiency across 4 MHz for a 1 kW system.