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This book describes machine learning-based new principles, methods of design and optimization of high-speed integrated circuits, included in one electronic system, which can exchange information between each other up to 128/256/512 Gbps speed. The efficiency of methods has been proven and is described on the examples of practical designs. This will enable readers to use them in similar electronic system designs. The author demonstrates newly developed principles and methods to accelerate communication between ICs, working in non-standard operating conditions, considering signal deviation compensation with linearity self-calibration. The observed circuit types also include but are not limited to mixed-signal, high performance heterogeneous integrated circuits as well as digital cores.
This book describes machine learning-based new principles, methods of design and optimization of high-speed integrated circuits, included in one electronic system, which can exchange information between each other up to 128/256/512 Gbps speed. The efficiency of methods has been proven and is described on the examples of practical designs. This will enable readers to use them in similar electronic system designs. The author demonstrates newly developed principles and methods to accelerate communication between ICs, working in non-standard operating conditions, considering signal deviation compensation with linearity self-calibration. The observed circuit types also include but are not limited to mixed-signal, high performance heterogeneous integrated circuits as well as digital cores.
This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.
The compiled volume originates from the notable contributions presented at the 1st International Conference on Advancementof Intelligent Computational Methods and Technologies (AICMT2023), which took place in a hybrid format on June 27, 2023,at Delhi Technical Campus, Greater Noida, Uttar Pradesh, India. This comprehensive collection serves as an exploration into the dynamic domain of intelligent computational methods and technologies, offering insights into the latest and upcoming trends in computation methods. AICMT2023’s scope encompasses the evolutionary trajectory of computational methods, addressing pertinent issues in real time implementation, delving into the emergence of new intelligent technologies, exploring next-generation problem-solving methodologies, and other interconnected areas. The conference is strategically designed to spotlight current research trendswithin the field, fostering a vibrant research culture and contributing to the collective knowledge base.
Despite the fact that in the digital domain, designers can take full benefits of IPs and design automation tools to synthesize and design very complex systems, the analog designers’ task is still considered as a ‘handcraft’, cumbersome and very time consuming process. Thus, tremendous efforts are being deployed to develop new design methodologies in the analog/RF and mixed-signal domains. This book collects 16 state-of-the-art contributions devoted to the topic of systematic design of analog, RF and mixed signal circuits. Divided in the two parts Methodologies and Techniques recent theories, synthesis techniques and design methodologies, as well as new sizing approaches in the field of robust analog and mixed signal design automation are presented for researchers and R/D engineers.
Topology Optimization and AI-based Design of Power Electronic and Electrical Devices: Principles and Methods provides an essential foundation in the emergent design methodology as it moves towards commercial development in such electrical devices as traction motors for electric motors, transformers, inductors, reactors and power electronics circuits. Opening with an introduction to electromagnetism and computational electromagnetics for optimal design, the work outlines principles and foundations in finite element methods and illustrates numerical techniques useful for finite element analysis. It summarizes the foundations of deterministic and stochastic optimization methods, including genetic algorithm, particle swarm optimization and simulated annealing, alongside representative algorithms. The work goes on to discuss parameter optimization and topology optimization of electrical devices alongside current implementations including magnetic shields, 2D and 3D models of electric motors, and wireless power transfer devices. The work concludes with a lengthy exposition of AI-based design methods, including surrogate models for optimization, deep neural networks, and automatic design methods using Monte-Carlo tree searches for electrical devices and circuits. Assists researchers and design engineers in applying emergent topology design optimization to power electronics and electrical device design, supported by step-by-step methods, heuristic derivation, and pseudocodes Proposes unique formulations of AI-based design for electrical devices using Monte Carlo tree search and other machine learning methods Is richly accompanied by detailed numerical examples and repletes with computational support materials in algorithms and explanatory formulae Includes access to pedagogical videos on topics including the evolutionary process of topology optimization, the distribution of genetic algorithms, and CMA-ES
​This book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification.
A number of fundamental topics in the field of high performance clock distribution networks is covered in this book. High Performance Clock Distribution Networks is composed of ten contributions from authors at academic and industrial institutions. Topically, these contributions can be grouped within three primary areas. The first topic area deals with exploiting the localized nature of clock skew. The second topic area deals with the implementation of these clock distribution networks, while the third topic area considers more long-range aspects of next-generation clock distribution networks. High Performance Clock Distribution Networks presents a number of interesting strategies for designing and building high performance clock distribution networks. Many aspects of the ideas presented in these contributions are being developed and applied today in next-generation high-performance microprocessors.