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Lack of high-density, fast and memory has been a long-standing problem in superconducting digital electronics. Alternative Josephson-junction-based memory cells and peripheral circuits have intrinsic problems which impede the application of that kind of memory. The CMOS-Josephson hybrid memory idea was proposed in 1992 to circumvent this problem. Evaluation of some issues was carried out in the 1990's. In the present work we have designed and demonstrated a 64-kb CMOS-Josephson hybrid memory working at 1 GHz; it has proved to be a promising memory candidate for superconducting high-end computing applications.
This book provides a comprehensive and up-to-date description of the Josephson effect, a topic of never-ending interest in both fundamental and applied physics. In this volume, world-renowned experts present the unique aspects of the physics of the Josephson effect, resulting from the use of new materials, of hybrid architectures and from the possibility of realizing nanoscale junctions. These new experimental capabilities lead to systems where novel coherent phenomena and transport processes emerge. All this is of great relevance and impact, especially when combined with the didactic approach of the book. The reader will benefit from a general and modern view of coherent phenomena in weakly-coupled superconductors on a macroscopic scale. Topics that have been only recently discussed in specialized papers and in short reviews are described here for the first time and organized in a general framework. An important section of the book is also devoted to applications, with focus on long-term, future applications. In addition to a significant number of illustrations, the book includes numerous tables for comparative studies on technical aspects.
This book provides readers with the current state-of-the-art research and technology on quantum computing. The authors provide design paradigms of quantum computing. Topics covered include multi-programming mechanisms on near-term quantum computing, Lagrange interpolation approach for the general parameter-shift rule, architecture-aware decomposition of quantum circuits, software for massively parallel quantum computing, machine learning in quantum annealing processors, quantum annealing for real-world machine learning applications, queuing theory models for (Fault-Tolerant) quantum circuits, machine learning for quantum circuit reliability assessment, and side-channel leakage in Suzuki stack circuits.
CMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored. CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a “hardware design space exploration” methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures. The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell’s device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described. CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.
CMOS Memory Circuits is a systematic and comprehensive reference work designed to aid in the understanding of CMOS memory circuits, architectures, and design techniques. CMOS technology is the dominant fabrication method and almost the exclusive choice for semiconductor memory designers. Both the quantity and the variety of complementary-metal-oxide-semiconductor (CMOS) memories are staggering. CMOS memories are traded as mass-products worldwide and are diversified to satisfy nearly all practical requirements in operational speed, power, size, and environmental tolerance. Without the outstanding speed, power, and packing density characteristics of CMOS memories, neither personal computing, nor space exploration, nor superior defense systems, nor many other feats of human ingenuity could be accomplished. Electronic systems need continuous improvements in speed performance, power consumption, packing density, size, weight, and costs. These needs continue to spur the rapid advancement of CMOS memory processing and circuit technologies. CMOS Memory Circuits is essential for those who intend to (1) understand, (2) apply, (3) design and (4) develop CMOS memories.