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This book provides a comprehensive discussion of automatic testing, diagnosis and tuning of analogue, mixed-signal and RF integrated circuits, and systems in a single source. As well as fundamental concepts and techniques, the book reports systematically the state of the arts and future research directions of those areas. A complete range of circuit components are covered and test issues from the SoC perspective. An essential reference for researchers and engineers in mixed signal testing, postgraduate and senior undergraduate students.
This second edition of An Engineer's Guide to Automated Testing of High-Speed Interfaces provides updates to reflect current state-of-the-art high-speed digital testing with automated test equipment technology (ATE). Featuring clear examples, this one-stop reference covers all critical aspects of automated testing, including an introduction to high-speed digital basics, a discussion of industry standards, ATE and bench instrumentation for digital applications, and test and measurement techniques for characterization and production environment. Engineers learn how to apply automated test equipment for testing high-speed digital I/O interfaces and gain a better understanding of PCI-Express 4, 100Gb Ethernet, and MIPI while exploring the correlation between phase noise and jitter. This updated resource provides expanded material on 28/32 Gbps NRZ testing and wireless testing that are becoming increasingly more pertinent for future applications. This book explores the current trend of merging high-speed digital testing within the fields of photonic and wireless testing.
Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and test engineers do not do their jobs very carefully. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is based on the author's 20 years of experience in memory design, memory reliability development and memory self test. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is written for the professional and the researcher to help them understand the memories that are being tested.
Testing techniques for VLSI circuits are undergoing many exciting changes. The predominant method for testing digital circuits consists of applying a set of input stimuli to the IC and monitoring the logic levels at primary outputs. If, for one or more inputs, there is a discrepancy between the observed output and the expected output then the IC is declared to be defective. A new approach to testing digital circuits, which has come to be known as IDDQ testing, has been actively researched for the last fifteen years. In IDDQ testing, the steady state supply current, rather than the logic levels at the primary outputs, is monitored. Years of research suggests that IDDQ testing can significantly improve the quality and reliability of fabricated circuits. This has prompted many semiconductor manufacturers to adopt this testing technique, among them Philips Semiconductors, Ford Microelectronics, Intel, Texas Instruments, LSI Logic, Hewlett-Packard, SUN microsystems, Alcatel, and SGS Thomson. This increase in the use of IDDQ testing should be of interest to three groups of individuals associated with the IC business: Product Managers and Test Engineers, CAD Tool Vendors and Circuit Designers. Introduction to IDDQ Testing is designed to educate this community. The authors have summarized in one volume the main findings of more than fifteen years of research in this area.
Timing, memory, power dissipation, testing, and testability are all crucial elements of VLSI circuit design. In this volume culled from the popular VLSI Handbook, experts from around the world provide in-depth discussions on these and related topics. Stacked gate, embedded, and flash memory all receive detailed treatment, including their power cons