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This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). A fast and highly fault efficient SAT-based ATPG framework is presented which is also able to generate high-quality delay tests such as robust path delay tests, as well as tests with long propagation paths to detect small delay defects. The aim of the techniques and methodologies presented in this book is to improve SAT-based ATPG, in order to make it applicable in industrial practice. Readers will learn to improve the performance and robustness of the overall test generation process, so that the ATPG algorithm reliably will generate test patterns for most targeted faults in acceptable run time to meet the high fault coverage demands of industry. The techniques and improvements presented in this book provide the following advantages: Provides a comprehensive introduction to test generation and Boolean Satisfiability (SAT); Describes a highly fault efficient SAT-based ATPG framework; Introduces circuit-oriented SAT solving techniques, which make use of structural information and are able to accelerate the search process significantly; Provides SAT formulations for the prevalent delay faults models, in addition to the classical stuck-at fault model; Includes an industrial perspective on the state-of-the-art in the testing, along with SAT; two topics typically distinguished from each other.
This book presents the lecture notes of the 1st Summer School on Methods and Tools for the Design of Digital Systems, 2015, held in Bremen, Germany. The topic of the summer school was devoted to modeling and verification of cyber-physical systems. This covers several aspects of the field, including hybrid systems and model checking, as well as applications in robotics and aerospace systems. The main chapters have been written by leading scientists, who present their field of research, each providing references to introductory material as well as latest scientific advances and future research directions. This is complemented by short papers submitted by the participating PhD students.
In Test Pattern Generation using Boolean Proof Engines, we give an introduction to ATPG. The basic concept and classical ATPG algorithms are reviewed. Then, the formulation as a SAT problem is considered. As the underlying engine, modern SAT solvers and their use on circuit related problems are comprehensively discussed. Advanced techniques for SAT-based ATPG are introduced and evaluated in the context of an industrial environment. The chapters of the book cover efficient instance generation, encoding of multiple-valued logic, usage of various fault models, and detailed experiments on multi-million gate designs. The book describes the state of the art in the field, highlights research aspects, and shows directions for future work.
This book, for the first time, provides comprehensive coverage on malicious modification of electronic hardware, also known as, hardware Trojan attacks, highlighting the evolution of the threat, different attack modalities, the challenges, and diverse array of defense approaches. It debunks the myths associated with hardware Trojan attacks and presents practical attack space in the scope of current business models and practices. It covers the threat of hardware Trojan attacks for all attack surfaces; presents attack models, types and scenarios; discusses trust metrics; presents different forms of protection approaches – both proactive and reactive; provides insight on current industrial practices; and finally, describes emerging attack modes, defenses and future research pathways.
This book describes reliable and efficient design automation techniques for the design and implementation of an approximate computing system. The authors address the important facets of approximate computing hardware design - from formal verification and error guarantees to synthesis and test of approximation systems. They provide algorithms and methodologies based on classical formal verification, synthesis and test techniques for an approximate computing IC design flow. This is one of the first books in Approximate Computing that addresses the design automation aspects, aiming for not only sketching the possibility, but providing a comprehensive overview of different tasks and especially how they can be implemented.
This book constitutes the refereed proceedings of the 17th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2015, held in Saint Malo, France, in September 2015. The 34 full papers included in this volume were carefully reviewed and selected from 128 submissions. They are organized in the following topical sections: processing techniques in side-channel analysis; cryptographic hardware implementations; homomorphic encryption in hardware; side-channel attacks on public key cryptography; cipher design and cryptanalysis; true random number generators and entropy estimations; side-channel analysis and fault injection attacks; higher-order side-channel attacks; physically unclonable functions and hardware trojans; side-channel attacks in practice; and lattice-based implementations.
This book constitutes the refereed proceedings of the 18th International Symposium on Practical Aspects of Declarative Languages, PADL 2016, held in St. Petersburg, FL, USA, in January 2016. The 11 revised papers presented were carefully reviewed and selected from 17 initial submissions for inclusion in the book. PADL is a forum for researchers and practitioners to present original work emphasizing novel applications and implementation techniques for all forms of declarative concepts, including, functional, logic, constraints, etc.
The satisfiability problem of propositional logic, SAT for short, is the first algorithmic problem that was shown to be NP-complete, and is the cornerstone of virtually all NP-completeness proofs. The SAT problem consists of deciding whether a given Boolean formula has a “solution”, in the sense of an assignment to the variables making the entire formula to evaluate to true. Over the last few years very powerful algorithms have been devised being able to solve SAT problems with hundreds of thousands of variables. For difficult (or randomly generated) formulas these algorithms can be compared to the proverbial search for the needle in a haystack. This book explains how such algorithms work, for example, by exploiting the structure of the SAT problem with an appropriate logical calculus, like resolution. But also algorithms based on “physical” principles are considered. I was delighted to see how nicely the authors were able to cover such a variety of topics with elegance. I cannot resist saying that the introduction to SAT on page 9 is absolutely the best I ever expect to see in any book! Donald E. Knuth, Stanford University This book gives lucid descriptions of algorithms for SAT that are better than you would think! A must-read for anyone in theory. William Gasarch, University of Maryland It was a wonderful surprise to see a deep mathematical analysis of important algorithms for SAT presented so clearly and concisely. This is an excellent introductory book for studying the foundations of constraint satisfaction. Osamu Watanabe, Tokyo Institute of Technology
This book introduces several novel approaches to pave the way for the next generation of integrated circuits, which can be successfully and reliably integrated, even in safety-critical applications. The authors describe new measures to address the rising challenges in the field of design for testability, debug, and reliability, as strictly required for state-of-the-art circuit designs. In particular, this book combines formal techniques, such as the Satisfiability (SAT) problem and the Bounded Model Checking (BMC), to address the arising challenges concerning the increase in test data volume, as well as test application time and the required reliability. All methods are discussed in detail and evaluated extensively, while considering industry-relevant benchmark candidates. All measures have been integrated into a common framework, which implements standardized software/hardware interfaces.
This book provides readers with a comprehensive, state-of-the-art overview of approximate computing, enabling the design trade-off of accuracy for achieving better power/performance efficiencies, through the simplification of underlying computing resources. The authors describe in detail various efforts to generate approximate hardware systems, while still providing an overview of support techniques at other computing layers. The book is organized by techniques for various hardware components, from basic building blocks to general circuits and systems.