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Driven by a strong demand for mobile and portable electronics, the chip market will undoubtedly impose "low power" as the key metric for microprocessor design. Although circuit and system level methods can be employed to reduce power, the fundamental limit in the overall energy efficiency of a system is still rooted in the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) operating principle and its immutable physics: an injection of thermally distributed carriers will not allow for switching characteristics better than 60 mV/dec at room temperature. This constraint ultimately defines the lowest energy consumed per digital operation attainable with current Complementary-Metal-Oxide-Semiconductor (CMOS) technology. In this work, Tunnel Field Effect Transistor (TFET) based on Band-to-Band Tunneling (BTBT) will be proposed and investigated as an alternative logic switch which can achieve steeper switching characteristics than the MOSFET to permit for lower threshold (V TH) and supply voltage (V DD) operation. It will be experimentally demonstrated that by employing Germanium (Ge) only in the source region of the device, a record high on to off current ratio (I ON /I OFF) can be obtained for 0.5 V operation. Technology Computer Aided Design (TCAD) calibrated to the measured data will be used to perform design optimization study. The performance of the optimized Ge-source TFET will be benchmarked against CMOS technology to show greater than 10x improvement in the overall energy efficiency for frequency range up to 500 MHz. The fundamental challenges associated with TFET-based digital logic design will be addressed. In order to mitigate these constraints, a circuit-level solution based on n-channel TFET Pass-Transistor Logic (PTL) will be proposed and demonstrated through mixed-mode simulations. The accompanying design modifications required at the device level will be discussed.
This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency.
Moore's law has driven technological improvements for decades by halving the areal footprint of the transistor every two years and increasing the performance of making integrated circuits while reducing their cost. The ability to reduce the footprint of the device was enabled by advances in processing technology, novel materials and device design. As ever-smaller footprints are desired, power density limitations and performance degradation require more innovations on all fronts. Recently introduced improvements to integrated circuits are high-K and metal gate for MOSFETs (45-nm node onward), the FinFET (22-nm node onward) and air gaps between copper interconnects (14-nm node) illustrating that at every new technology node there needs to be a materials or process-related improvement to reduce power and maintain performance. Other approaches are also being explored or taken to further improve the MOSFET performance in future technology nodes, namely use of channel materials with higher carrier mobility such as SiGe and Ge for p-MOSFETs, III-V compound semiconductors for n-MOSFETs and steep subthreshold swing devices such as tunnel field effect transistors (TFETs). This work evaluates both approaches utilizing germanium (Ge) and strained-Ge as a material to understand the benefits and drawbacks to both approaches. Hypothetically, high carrier mobility and velocity channel materials can lower the overall power consumption because lower power supply voltage is required to obtain the same amount of current. Germanium and strained-Ge are candidates for the channel material of p-MOSFETs. MOSFETs made using Ge and strained-Ge as the channel material are evaluated based upon the ITRS roadmap requirements using experimental results in this work and data from literature. The approach for using TFETs was evaluated in this work also using germanium as a channel material. TFETs can have a steep subthreshold swing (SS), better than the minimum of 60 mV/decade at room temperature for a MOSFET, which also reduces the total power and supply voltage required for operation. The reduced SS is hypothetically achieved through the band-to-band tunneling which allows for the filtering of the Fermi-tail distribution of carriers. Experimentally, TFETs have not generally shown the steeper than Fermi-tail SS promised by the theory and this work uses both results from fabricated strained-Si/strained-Ge TFETs as well as modeling to explain why this has been the case. The challenges for both technologies are outlined in this thesis and suggestions are made on approaches to tackling their respective intrinsic problems from the point of view of Ge-based devices.
Research into Tunneling Field Effect Transistors (TFETs) has developed significantly in recent times, indicating their significance in low power integrated circuits. This book describes the qualitative and quantitative fundamental concepts of TFET functioning, the essential components of the problem of modelling the TFET, and outlines the most commonly used mathematical approaches for the same in a lucid language. Divided into eight chapters, the topics covered include: Quantum Mechanics, Basics of Tunneling, The Tunnel FET, Drain current modelling of Tunnel FET: The task and its challenges, Modeling the Surface Potential in TFETs, Modelling the Drain Current, and Device simulation using Technology Computer Aided Design (TCAD). The information is well organized, describing different phenomena in the TFETs using simple and logical explanations. Key features: * Enables readers to understand the basic concepts of TFET functioning and modelling in order to read, understand, and critically analyse current research on the topic with ease. * Includes state-of-the-art work on TFETs, attempting to cover all the recent research articles published on the subject. * Discusses the basic physics behind tunneling, as well as the device physics of the TFETs. * Provides detailed discussion on device simulations along with device physics so as to enable researchers to carry forward their study on TFETs. Primarily targeted at new and practicing researchers and post graduate students, the book would particularly be useful for researchers who are working in the area of compact and analytical modelling of semiconductor devices.
Micro and nanoelectronic devices are the prime movers for electronics, which is essential for the current information age. This unique monograph identifies the key stages of advanced device design and integration in semiconductor manufacturing. It brings into one resource a comprehensive device design using simulation. The book presents state-of-the-art semiconductor device design using the latest TCAD tools.Professionals, researchers, academics, and graduate students in electrical & electronic engineering and microelectronics will benefit from this reference text.
During the last decade, there has been a great deal of interest in TFETs. To the best authors’ knowledge, no book on TFETs currently exists. The proposed book provides readers with fundamental understanding of the TFETs. It explains the interesting characteristics of the TFETs, pointing to their strengths and weaknesses, and describes the novel techniques that can be employed to overcome these weaknesses and improve their characteristics. Different tradeoffs that can be made in designing TFETs have also been highlighted. Further, the book provides simulation example files of TFETs that could be run using a commercial device simulator.
During the last decade, there has been a great deal of interest in TFETs. To the best authors’ knowledge, no book on TFETs currently exists. The proposed book provides readers with fundamental understanding of the TFETs. It explains the interesting characteristics of the TFETs, pointing to their strengths and weaknesses, and describes the novel techniques that can be employed to overcome these weaknesses and improve their characteristics. Different tradeoffs that can be made in designing TFETs have also been highlighted. Further, the book provides simulation example files of TFETs that could be run using a commercial device simulator.
Advanced Field-Effect Transistors: Theory and Applications offers a fresh perspective on the design and analysis of advanced field-effect transistor (FET) devices and their applications. The text emphasizes both fundamental and new paradigms that are essential for upcoming advancement in the field of transistors beyond complementary metal–oxide–semiconductors (CMOS). This book uses lucid, intuitive language to gradually increase the comprehension of readers about the key concepts of FETs, including their theory and applications. In order to improve readers’ learning opportunities, Advanced Field-Effect Transistors: Theory and Applications presents a wide range of crucial topics: Design and challenges in tunneling FETs Various modeling approaches for FETs Study of organic thin-film transistors Biosensing applications of FETs Implementation of memory and logic gates with FETs The advent of low-power semiconductor devices and related implications for upcoming technology nodes provide valuable insight into low-power devices and their applicability in wireless, biosensing, and circuit aspects. As a result, researchers are constantly looking for new semiconductor devices to meet consumer demand. This book gives more details about all aspects of the low-power technology, including ongoing and prospective circumstances with fundamentals of FET devices as well as sophisticated low-power applications.
This reference text discusses conduction mechanism, structure construction, operation, performance evaluation and applications of nanoscale semiconductor materials and devices in VLSI circuits design. The text explains nano materials, devices, analysis of its design parameters to meet the sub-nano-regime challenges for CMOS devices. It discusses important topics including memory design and testing, fin field-effect transistor (FinFET), tunnel field-effect transistor (TFET) for sensors design, carbon nanotube field-effect transistor (CNTFET) for memory design, nanowire and nanoribbons, nano devices based low-power-circuit design, and microelectromechanical systems (MEMS) design. The book discusses nanoscale semiconductor materials, device models, and circuit design covers nanoscale semiconductor device structures and modeling discusses novel nano-semiconductor devices such as FinFET, CNTFET, and Nanowire covers power dissipation and reduction techniques Discussing innovative nanoscale semiconductor device structures and modeling, this text will be useful for graduate students, and academic researchers in diverse areas such as electrical engineering, electronics and communication engineering, nanoscience, and nanotechnology. It covers nano devices based low-power-circuit design, nanoscale devices based digital VLSI circuits, and novel devices based analog VLSI circuits design.
This Second Edition provides all the required information for a course in modern device electronics taken by undergraduate electrical engineers. Offers major new coverage of silicon technology, adds several topics in basic semiconductor physics not treated previously, and introduces Hall-effect sensors. The chapters on MOSFET have been entirely updated, focusing on mobility variations and threshold-voltage dependence. Additional topics include VLSI devices, short channel effects, and computer modeling.