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"It may be desired to apply Digital Signal Processing (DSP) to high bandwidth signals with a sampling rate too high for being handled by any commercially available processor. One approach to solve this problem is to divide the spectrum of the signal into subbands by an analysis filter bank, then process the subbands in parallel, and finally, recombine the processed subband signals by a synthesis filter bank. The key point is the fact, that the sampling rate in the subbands can be reduced by downsampling, because the bandwidth of the subband signals is reduced. Figure 1.1 shows this idea. This report describes a hardware implementation of Figure 1.1. The analysis and synthesis filter banks are implemented with Field Programmable Gate Arrays (FPGAs), the subband processing is accomplished with Motorola DSP 56302 Evaluation Modules (EVMs)."--Page 1.
An important working resource for engineers and researchers involved in the design, development, and implementation of signal processing systems The last decade has seen a rapid expansion of the use of field programmable gate arrays (FPGAs) for a wide range of applications beyond traditional digital signal processing (DSP) systems. Written by a team of experts working at the leading edge of FPGA research and development, this second edition of FPGA-based Implementation of Signal Processing Systems has been extensively updated and revised to reflect the latest iterations of FPGA theory, applications, and technology. Written from a system-level perspective, it features expert discussions of contemporary methods and tools used in the design, optimization and implementation of DSP systems using programmable FPGA hardware. And it provides a wealth of practical insights—along with illustrative case studies and timely real-world examples—of critical concern to engineers working in the design and development of DSP systems for radio, telecommunications, audio-visual, and security applications, as well as bioinformatics, Big Data applications, and more. Inside you will find up-to-date coverage of: FPGA solutions for Big Data Applications, especially as they apply to huge data sets The use of ARM processors in FPGAs and the transfer of FPGAs towards heterogeneous computing platforms The evolution of High Level Synthesis tools—including new sections on Xilinx's HLS Vivado tool flow and Altera's OpenCL approach Developments in Graphical Processing Units (GPUs), which are rapidly replacing more traditional DSP systems FPGA-based Implementation of Signal Processing Systems, 2nd Edition is an indispensable guide for engineers and researchers involved in the design and development of both traditional and cutting-edge data and signal processing systems. Senior-level electrical and computer engineering graduates studying signal processing or digital signal processing also will find this volume of great interest.
Feedback-Based Orthogonal Digital Filters: Theory, Applications, and Implementation develops the theory of a feedback-based orthogonal digital filter and examines several applications where the filter topology leads to a simple and efficient solution. The development of the filter structure is linked to concepts in observer theory. Several signal processing problems can be represented as estimation problems, where a parametric representation of the input is used, to try and replicate it locally. This estimation problem can be solved using an identity observer, and the filter topology falls in this framework. Hence the filter topology represents a universal building block that can find application in several problems, such as spectral estimation, time-recursive computation of transforms, etc. Further, because of the orthogonality constraints satisfied by the structure, it also represents a robust solution under finite precision conditions. The book also presents the observer-based viewpoint of several signal processing problems, and shows that problems that are typically treated independently in the literature are in fact linked and can be cast in a single unified framework. In addition to examining the theoretical issues, the book describes practical issues related to a hardware implementation of the building block, in both the digital and analog domain. On the digital side, issues relating to implementation using semi-custom chips (FPGA's), and ASIC design are examined. On the analog side, the design and testing of a fabricated chip, that functions as a multi-sinusoidal phase-locked-loop, are described. Feedback-Based Orthogonal Digital Filters serves as an excellent reference. May be used as a text for advanced courses on the subject.
Digital signal processing (DSP) covers a wide range of applications in which the implementation of high-performance systems to meet stringent requirements and performance constraints is receiving increasing attention both in the industrial and academic contexts. Conceived to be available to a wide audience, the aim of this book is to provide students, researchers, engineers and the industrial community with a guide to the latest advances in emerging issues in the design and implementation of DSP systems for application-specific circuits and programmable devices. The book is divided into different sections including real-time audio applications, optical signal processing, image and video processing and advanced architectures and implementations. It will enable early-stage researchers and developers to deal with the important gap in knowledge in the transition from algorithm specification to the design of architectures for VLSI implementations.
Starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices, while the accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. This edition has a new chapter on adaptive filters, new sections on division and floating point arithmetics, an up-date to the current Altera software, and some new exercises.
Throughput, spectral efficiency and power consumption are the three major factors that drive the evolution of the communication systems. The data rate of modern wireless communication has increased from 10 kb/s (1995 narrow band GSM) to over 100 Mb/s (2015 LTE Advanced) in just twenty years. The data rate of the wired communication has reached more than 2 Gb/s to accommodate the fast growing cellular data rates. The Moore's law is still in effect and the wideband communication era continues to become more entrenched in our daily lives! Dealing with wideband signals poses great challenges to our existing signal processing approaches. At a high sample rate, i.e., GHz level, any non-trivial signal processing, e.g., digital filtering, may saturate the processing resources. This is because the signal's sample rate has become comparable to the hardware's clock rate! At such high rate, significant amount of hardware resources or parallelism is needed to execute the required number of multiply and accumulation operations. This phenomenon is the bottleneck in our further pursuit of higher data rate communication and will raise the hardware cost significantly. This dissertation tackles several challenging wideband signal processing problems in communication system design. In particular, we propose the non-maximally decimated filter bank (NMDFB) based digital filtering approach. A key attribute of this structure is that the filtering is achieved via the intermediated processing element (IPE) embedded in between a pair of analysis and synthesis NMDFB. The polyphase implementation of NMDFB has its workload on the same order as the FFT and is thus extremely efficient. This type of digital filter implementation not only allows the signal processing to be performed at a significantly reduced sampling rate but also exhibits significant savings in power consumption over the conventional approaches. The NMDFB based processing supports many if not all of the commonly used filtering tasks in communications, and therefore can be used to implement a wideband receiver. We demonstrate this by developing a NMDFB based efficient linear / non-linear equalization techniques for single carrier QAM signal. We also address the carrier and symbol timing synchronization problems based on NMDFB approach. Besides the filtering tasks, the NMDFB based architecture also enables several key signal processing tasks required by the future's communication systems. We show NMDFB can be used as the basis of an efficient wideband diversity combiner over frequency selective channels. We also demonstrate advanced channelization technique based on NMDFB. Unlike the existing channelizers that often pose constrains on either signal format or signal spectrum, the proposed channelizer is able to channelize multiple signals with arbitrary center frequency, arbitrary bandwidth and arbitrary format.
Most real-world spectrum analysis problems involve the computation of the real-data discrete Fourier transform (DFT), a unitary transform that maps elements N of the linear space of real-valued N-tuples, R , to elements of its complex-valued N counterpart, C , and when carried out in hardware it is conventionally achieved via a real-from-complex strategy using a complex-data version of the fast Fourier transform (FFT), the generic name given to the class of fast algorithms used for the ef?cient computation of the DFT. Such algorithms are typically derived by explo- ing the property of symmetry, whether it exists just in the transform kernel or, in certain circumstances, in the input data and/or output data as well. In order to make effective use of a complex-data FFT, however, via the chosen real-from-complex N strategy, the input data to the DFT must ?rst be converted from elements of R to N elements of C . The reason for choosing the computational domain of real-data problems such N N as this to be C , rather than R , is due in part to the fact that computing equ- ment manufacturers have invested so heavily in producing digital signal processing (DSP) devices built around the design of the complex-data fast multiplier and accumulator (MAC), an arithmetic unit ideally suited to the implementation of the complex-data radix-2 butter?y, the computational unit used by the familiar class of recursive radix-2 FFT algorithms.
This book presents the basic concepts of adaptive signal processing and adaptive filtering in a concise and straightforward manner, using clear notations that facilitate actual implementation. Important algorithms are described in detailed tables which allow the reader to verify learned concepts. The book covers the family of LMS and algorithms as well as set-membership, sub-band, blind, IIR adaptive filtering, and more. The book is also supported by a web page maintained by the author.