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This presentation is an overview of the research in progress on fault detection methods for circuits, both combinational circuits and sequential circuits. A summary of some of the existing techniques for minimal test set generation is followed by an introduction to the concept and theory of a minimal test sequence as a new approach for fault detection in combinational circuits. A detailed explanation of Triadic Graph Theory is followed by a summary of the existing techniques for parallel processing in Boolean Algebra. The main contribution of this paper is the extension of the applications of the Boolean Analyzer to the generation of: (1) Boolean Differences; (2) 'stuck-at' fault tests for a circuit (similar to those generated by Roth's D-Algorithm); and (3) the Test Sequence(s) of a circuit.
The three volume set LNCS 13155, 13156, and 13157 constitutes the refereed proceedings of the 21st International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2021, which was held online during December 3-5, 2021. The total of 145 full papers included in these proceedings were carefully reviewed and selected from 403 submissions. They cover the many dimensions of parallel algorithms and architectures including fundamental theoretical approaches, practical experimental projects, and commercial components and systems. The papers were organized in topical sections as follows: Part I, LNCS 13155: Deep learning models and applications; software systems and efficient algorithms; edge computing and edge intelligence; service dependability and security algorithms; data science; Part II, LNCS 13156: Software systems and efficient algorithms; parallel and distributed algorithms and applications; data science; edge computing and edge intelligence; blockchain systems; deept learning models and applications; IoT; Part III, LNCS 13157: Blockchain systems; data science; distributed and network-based computing; edge computing and edge intelligence; service dependability and security algorithms; software systems and efficient algorithms.
Spectral Techniques and Fault Detection focuses on the spectral techniques for the analysis, testing, and design of digital devices. This book discusses the error detection and correction in digital devices. Organized into 10 chapters, this book starts with an overview of the concepts and tools to evaluate the applicability of various spectral approaches and fault-detection techniques to the design. This text then describes the class of generalized Programmable Logic Array configurations called Encoded PLAs. Other chapters consider the two-sided Chrestenson Transform to the analysis of some pattern properties. This book describes as well a certain type of cellular arrays for highly parallel processing, namely, three-dimensional arrays. The final chapter deals with the system design methods that allow and encourage designers to incorporate the necessary distributed error correction throughout any digital system. This book is a valuable resource for graduate students and engineers working in the fields of logic design, spectral techniques, testing, and self-testing of digital devices.
The two internationally renowned authors elucidate the structure of "fast" parallel computation. Its complexity is emphasised through a variety of techniques ranging from finite combinatorics, probability theory and finite group theory to finite model theory and proof theory. Non-uniform computation models are studied in the form of Boolean circuits; uniform ones in a variety of forms. Steps in the investigation of non-deterministic polynomial time are surveyed as is the complexity of various proof systems. Providing a survey of research in the field, the book will benefit advanced undergraduates and graduate students as well as researchers.
With the rapid growth of integration scale of VLSI chips and the present need for reliable computers in space exploration, fault diagnosis and fault toleran ce have become more important than before, and hence reveal a lot of interest ing topics which attract many researchers to make a great number of contribu tions to this field. In recent years, many new and significant results have been achieved. A quick scan over the proceedings of the conferences on fault tolerant computing and design automation as well as on testing will convince the reader of that. But unfortunately these achievements have not been entire ly reflected in the textbooks, so that there seems to be a gap for the new researcher who already has the basic knowledge and wants to begin research in this area. As a remedy for this deficiency, this book is intended for begin ners, especially graduate students, as a textbook which will lead them to the frontier of some branches of the fault-tolerant computing field. The first chapter introduces the four-valued logic B4 and its applica tions. In 1966 Roth first proposed this four-valued logic as a technique to generate tests for logical circuits, but this work did not concern the mathe matical basis of B4 itself.