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Modern society is witnessing a sea change in ubiquitous computing, in which people have embraced computing systems as an indispensable part of day-to-day existence. Computation, storage, and communication abilities of smartphones, for example, have undergone monumental changes over the past decade. However, global emphasis on creating and sustaining green environments is leading to a rapid and ongoing proliferation of edge computing systems and applications. As a broad spectrum of healthcare, home, and transport applications shift to the edge of the network, near-threshold computing (NTC) is emerging as one of the promising low-power computing platforms. An NTC device sets its supply voltage close to its threshold voltage, dramatically reducing the energy consumption. Despite showing substantial promise in terms of energy efficiency, NTC is yet to see widescale commercial adoption. This is because circuits and systems operating with NTC suffer from several problems, including increased sensitivity to process variation, reliability problems, performance degradation, and security vulnerabilities, to name a few. To realize its potential, we need designs, techniques, and solutions to overcome these challenges associated with NTC circuits and systems. The readers of this book will be able to familiarize themselves with recent advances in electronics systems, focusing on near-threshold computing.
Noise abatement is the key problem of small-scaled circuit design. New computational paradigms are needed -- as these circuits shrink, they become very vulnerable to noise and soft errors. In this lecture, we present a probabilistic computation framework for improving the resiliency of logic gates and circuits under random conditions induced by voltage or current fluctuation. Among many probabilistic techniques for modeling such devices, only a few models satisfy the requirements of efficient hardware implementation -- specifically, Boltzman machines and Markov Random Field (MRF) models. These models have similar built-in noise-immunity characteristics based on feedback mechanisms. In probabilistic models, the values 0 and 1 of logic functions are replaced by degrees of beliefs that these values occur. An appropriate metric for degree of belief is probability. We discuss various approaches for noise-resilient logic gate design, and propose a novel design taxonomy based on implementation of the MRF model by a new type of binary decision diagram (BDD), called a cyclic BDD. In this approach, logic gates and circuits are designed using 2-to-1 bi-directional switches. Such circuits are often modeled using Shannon expansions with the corresponding graph-based implementation, BDDs. Simulation experiments are reported to show the noise immunity of the proposed structures. Audiences who may benefit from this lecture include graduate students taking classes on advanced computing device design, and academic and industrial researchers. Table of Contents: Introduction to probabilistic computation models / Nanoscale circuits and fluctuation problems / Estimators and Metrics / MRF Models of Logic Gates / Neuromorphic models / Noise-tolerance via error correcting / Conclusion and future work
This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardware security and authentication System on Chip design methodologies on-chip power management and energy harvesting ultra-low power analog interfaces and analog-digital conversion short-range radios miniaturized battery technologies packaging and assembly of IoT integrated systems (on silicon and non-silicon substrates). As a common thread, all chapters conclude with a prospective view on the foreseeable evolution of the related technologies for IoT. The concepts developed throughout the book are exemplified by two IoT node system demonstrations from industry. The unique balance between breadth and depth of this book: enables expert readers quickly to develop an understanding of the specific challenges and state-of-the-art solutions for IoT, as well as their evolution in the foreseeable future provides non-experts with a comprehensive introduction to integrated circuit design for IoT, and serves as an excellent starting point for further learning, thanks to the broad coverage of topics and selected references makes it very well suited for practicing engineers and scientists working in the hardware and chip design for IoT, and as textbook for senior undergraduate, graduate and postgraduate students ( familiar with analog and digital circuits).
This book enables readers to achieve ultra-low energy digital system performance. The author’s main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy.
This book provides readers with a comprehensive, state-of-the-art overview of approximate computing, enabling the design trade-off of accuracy for achieving better power/performance efficiencies, through the simplification of underlying computing resources. The authors describe in detail various efforts to generate approximate hardware systems, while still providing an overview of support techniques at other computing layers. The book is organized by techniques for various hardware components, from basic building blocks to general circuits and systems.
The Handbook of Algorithms for Wireless Networking and Mobile Computing focuses on several aspects of mobile computing, particularly algorithmic methods and distributed computing with mobile communications capability. It provides the topics that are crucial for building the foundation for the design and construction of future generations of mobile and wireless networks, including cellular, wireless ad hoc, sensor, and ubiquitous networks. Following an analysis of fundamental algorithms and protocols, the book offers a basic overview of wireless technologies and networks. Other topics include issues related to mobility, aspects of QoS provisioning in wireless networks, future applications, and much more.
This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.
Gain Critical Insight into the Parallel I/O Ecosystem Parallel I/O is an integral component of modern high performance computing (HPC), especially in storing and processing very large datasets to facilitate scientific discovery. Revealing the state of the art in this field, High Performance Parallel I/O draws on insights from leading practitioners, researchers, software architects, developers, and scientists who shed light on the parallel I/O ecosystem. The first part of the book explains how large-scale HPC facilities scope, configure, and operate systems, with an emphasis on choices of I/O hardware, middleware, and applications. The book then traverses up the I/O software stack. The second part covers the file system layer and the third part discusses middleware (such as MPIIO and PLFS) and user-facing libraries (such as Parallel-NetCDF, HDF5, ADIOS, and GLEAN). Delving into real-world scientific applications that use the parallel I/O infrastructure, the fourth part presents case studies from particle-in-cell, stochastic, finite volume, and direct numerical simulations. The fifth part gives an overview of various profiling and benchmarking tools used by practitioners. The final part of the book addresses the implications of current trends in HPC on parallel I/O in the exascale world.
This book constitutes the proceedings of the 34th International Conference on Architecture of Computing Systems, ARCS 2021, held virtually in July 2021. The 12 full papers in this volume were carefully reviewed and selected from 24 submissions. 2 workshop papers (VEFRE) are also included. ARCS has always been a conference attracting leading-edge research outcomes in Computer Architecture and Operating Systems, including a wide spectrum of topics ranging from fully integrated, self-powered embedded systems up to high-performance computing systems. It also provides a platform covering newly emerging and cross-cutting topics, such as autonomous and ubiquitous systems, reconfigurable computing and acceleration, neural networks and artificial intelligence. The selected papers cover a variety of topics from the ARCS core domains, including heterogeneous computing, memory optimizations, and organic computing.
Rugged Embedded Systems: Computing in Harsh Environments describes how to design reliable embedded systems for harsh environments, including architectural approaches, cross-stack hardware/software techniques, and emerging challenges and opportunities. A "harsh environment" presents inherent characteristics, such as extreme temperature and radiation levels, very low power and energy budgets, strict fault tolerance and security constraints, etc. that challenge the computer system in its design and operation. To guarantee proper execution (correct, safe, and low-power) in such scenarios, this contributed work discusses multiple layers that involve firmware, operating systems, and applications, as well as power management units and communication interfaces. This book also incorporates use cases in the domains of unmanned vehicles (advanced cars and micro aerial robots) and space exploration as examples of computing designs for harsh environments. - Provides a deep understanding of embedded systems for harsh environments by experts involved in state-of-the-art autonomous vehicle-related projects - Covers the most important challenges (fault tolerance, power efficiency, and cost effectiveness) faced when developing rugged embedded systems - Includes case studies exploring embedded computing for autonomous vehicle systems (advanced cars and micro aerial robots) and space exploration