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Abstract: Nowadays, wireless communication devices need a compact wireless receiver, so that it can access all the available services at any time and at any location with minimum power consumption and compact area. The desire for covering all the service specifications tremendously increases the demand for multi-band/multi-standard wireless receivers. A reconfigurable receiver comes to give a hand. In this work, a universal programmable multi-band multi-standard receiver using CMOS technology is proposed. The receiver aims to target LTE specifications on the frequency range (700MHz-2.4GHz) as a case study to prove the concept of supporting multi-bands. The receiver is tested over three different frequencies 500MHz, 1GHz and 2GHz to prove its programmability. Sampling receivers and impedance translation technique are the main factors to approach the desired programmable receiver front-end. The receiver uses a quadrature band-pass charge sampling filter programmed via its controlling clocks. It forms the signal path which selects the signal, down-converts it to IF frequency and subsamples the signal decreasing the sampling frequency of the proceeding ADC. By adjusting the controlling clocks of the switches, the filter center frequency is maintained at the desired frequency. A time varying matching network based on impedance translation technique is used for multi-frequencies matching and further selectivity enhancing the receiver's linearity. The receiver front-end architecture achieves a NF of (7: 9) dB, a gain of (23: 28) dB, an out-of-band IIP3 of (-1.9 : -5.5) dBm and an in-band IIP3 of (-1.9 : -5.7) dBm across the tested frequencies. The design is tested across process corners. The layout of the design occupies 0.45mm2. The design is tested post layout to prove its reliability.
Nowadays, wireless communication devices need a compact wireless receiver, so that it can access all the available services at any time and at any location with minimum power consumption and compact area. The desire for covering all the service specifications tremendously increases the demand for multi-band/multi-standard wireless receivers. A reconfigurable receiver comes to give a hand. In this book, a universal programmable multi-band multi-standard receiver using CMOS technology is proposed. The receiver aims to target the LTE specifications on the frequency range (700MHz-2.4GHz) as a case study to prove the concept of supporting multi-bands.
This book investigates solutions, benefits, limitations, and costs associated with multi-standard operation of RF front-ends and their ability to adapt to variable radio environments. Next, it highlights the optimization of RF front-ends to allow maximum performance within a certain power budget, while targeting full integration. Finally, the book investigates possibilities for low-voltage, low-power circuit topologies in CMOS technology.
With the demand for the wireless communication system to support multiple frequency bands introduced by new standards, multi-standard transceivers with low cost, low power, and high integrity start to receive more attention in recent years. As the number of operating frequency bands increases, the number of external filters and low-noise amplifiers in a commonly used multi-standard receiver with parallel architecture increases. It leads to high power consumption and low feasibility for high integration design. Compared to the RF transmitter, the design of the RF receiver front end is considered to be more challenging due to the increased signal interference/noise in the communication path, which often can be neglected in transmitter design due to the large discrepancy between the noise level and the signal level. Generally, the most important performance parameters of a receiver front end are selectivity and sensitivity. From the view of microwave design, the selectivity of a receiver front end is strongly dependent on the design of the microwave filters, which determines the bandwidth and signal selectivity. The sensitivity of a receiver front end is strongly dependent on the design of a low noise amplifier, which is often the first active device in the receiver front end and determines the noise added to the system. To reduce the number of external filters and low noise amplifiers for multiband requirements, a system architecture formed by multiband RF filters and low-noise amplifiers is exploited. Advanced design theory and methodology are proposed in the thesis to the design of the components including bandpass filters, multi-band filters, and low-noise amplifiers. The proposed design methods and techniques proposed in this thesis include a multistage EM-based bandpass filter design and optimization method based on reflected group delay design procedure and space mapping technique, an EM-based multiband filter design and optimization method using coupling matrix decomposition technique, an EMbased multiband filter design and optimization method using multiband reflected group delay and cascade space mapping, and a multi-objective method for low-noise amplifier design. Generally, the research in this work focuses on developing and implementing novel design theory and techniques that can be exploited to simplify the system architecture and improve the design efficiency of microwave components in a modern RF receiver front end.
Summarizes cutting-edge physical layer technologies for multi-mode wireless RF transceivers. Includes original contributions from distinguished researchers and professionals. Covers cutting-edge physical layer technologies for multi-mode wireless RF transceivers. Contributors are all leading researchers and professionals in this field.
Wireless Receiver Architectures and Design presents the various designs and architectures of wireless receivers in the context of modern multi-mode and multi-standard devices. This one-stop reference and guide to designing low-cost low-power multi-mode, multi-standard receivers treats analog and digital signal processing simultaneously, with equal detail given to the chosen architecture and modulating waveform. It provides a complete understanding of the receiver‘s analog front end and the digital backend, and how each affects the other. The book explains the design process in great detail, starting from an analysis of requirements to the choice of architecture and finally to the design and algorithm development. The advantages and disadvantages of each wireless architecture and the suitability to a standard are given, enabling a better choice of design methodology, receiver lineup, analog block, and digital algorithm for a particular architecture. Whether you are a communications engineer working in system architecture and waveform design, an RF engineer working on noise and linearity budget and line-up analysis, a DSP engineer working on algorithm development, or an analog or digital design engineer designing circuits for wireless transceivers, this book is your one-stop reference and guide to designing low-cost low-power multi-mode multi-standard receivers. The material in this book is organized and presented to lead you from applied theory to practical design with plenty of examples and case studies drawn from modern wireless standards. Provides a complete description of receiver architectures together with their pros and cons, enabling a better choice of design methodology Covers the design trade-offs and algorithms between the analog front end and the digital modem – enabling an end-to-end design approach Addresses multi-mode multi-standard low-cost, low-power radio design – critical for producing the applications for Smart phones and portable internet devices
This book investigates solutions, benefits, limitations, and costs associated with multi-standard operation of RF front-ends and their ability to adapt to variable radio environments. Next, it highlights the optimization of RF front-ends to allow maximum performance within a certain power budget, while targeting full integration. Finally, the book investigates possibilities for low-voltage, low-power circuit topologies in CMOS technology.
This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs). The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion architecture. This allows readers give a power consumption budget to determine how much filtering is required on the receive path, by considering the ADC performance characteristics and the corresponding blocker diagram.
This is the first book on the subject of multi-standard wireless receivers. It covers both the analysis and design aspects of CMOS radio receivers, with primary focus on receivers for mobile terminals. The subject of multi-standard data converter design for base stations is also covered.
This book provides readers with a state-of-the-art description of techniques to be used for ultra-low-power (ULP) and ultra-low-cost (ULC), short-range wireless receivers. Readers will learn what is required to deploy these receivers in short-range wireless sensor networks, which are proliferating widely to serve the internet of things (IoT) for “smart cities.” The authors address key challenges involved with the technology and the typical tradeoffs between ULP and ULC. Three design examples with advanced circuit techniques are described in order to address these trade-offs, which special focus on cost minimization. These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.